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Wed, 26 Aug 2020 03:11:10 -0800 Received: from MTKMBS31N2.mediatek.inc (172.27.4.87) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 26 Aug 2020 04:11:07 -0700 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 26 Aug 2020 19:11:05 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 26 Aug 2020 19:11:05 +0800 Message-ID: <1598440183.30048.14.camel@mhfsdcap03> Subject: Re: [v4,2/4] dt-binding: reset-controller: ti: add 'mediatek,infra-reset' to compatible From: Crystal Guo To: Rob Herring Date: Wed, 26 Aug 2020 19:09:43 +0800 In-Reply-To: <20200825190219.GA1125997@bogus> References: <20200817030324.5690-1-crystal.guo@mediatek.com> <20200817030324.5690-3-crystal.guo@mediatek.com> <20200825190219.GA1125997@bogus> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: F5BA3F4B05E182D188D3A309D1F49535F9637CD33A5A9DB6DAE3FFCC36DBD5282000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200826_071113_624604_2793F2E2 X-CRM114-Status: GOOD ( 19.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "devicetree@vger.kernel.org" , Yong Liang =?UTF-8?Q?=28=E6=A2=81=E5=8B=87=29?= , Stanley Chu =?UTF-8?Q?=28=E6=9C=B1=E5=8E=9F=E9=99=9E=29?= , srv_heupstream , Seiya Wang =?UTF-8?Q?=28=E7=8E=8B=E8=BF=BA=E5=90=9B=29?= , "linux-kernel@vger.kernel.org" , "afd@ti.com" , Fan Chen =?UTF-8?Q?=28=E9=99=B3=E5=87=A1=29?= , "linux-mediatek@lists.infradead.org" , "p.zabel@pengutronix.de" , "matthias.bgg@gmail.com" , Yingjoe Chen =?UTF-8?Q?=28=E9=99=B3=E8=8B=B1=E6=B4=B2=29?= , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 2020-08-26 at 03:02 +0800, Rob Herring wrote: > On Mon, Aug 17, 2020 at 11:03:22AM +0800, Crystal Guo wrote: > > The TI syscon reset controller provides a common reset management, > > and is suitable for MTK SoCs. Add compatible 'mediatek,infra-reset', > > which denotes to use ti reset-controller driver directly. > > > > Signed-off-by: Crystal Guo > > --- > > Documentation/devicetree/bindings/reset/ti-syscon-reset.txt | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt b/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt > > index ab041032339b..5a0e9365b51b 100644 > > --- a/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt > > +++ b/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt > > @@ -25,6 +25,7 @@ Required properties: > > "ti,k2l-pscrst" > > "ti,k2hk-pscrst" > > "ti,syscon-reset" > > + "mediatek,infra-reset", "ti,syscon-reset" > > You need your own binding doc. If you can use the same driver then fine, > but that's a separate issue. There's also reset-simple driver if you > have just array of 32-bit registers with a bit per reset. > > Don't repeat 'ti,reset-bits' either. Do you mean I should add a Mediatek reset binding doc, although Mediatek reuse the TI reset controller directly? Best Regards Crystal > > > - #reset-cells : Should be 1. Please see the reset consumer node below > > for usage details > > - ti,reset-bits : Contains the reset control register information > > -- > > 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel