From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC813C56202 for ; Wed, 25 Nov 2020 18:56:19 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4C76D206B5 for ; Wed, 25 Nov 2020 18:56:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="xTwtIGFE" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4C76D206B5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=S313higkSLks54BjfIiI4Skf+6c9u5ik7kZHFn/4kno=; b=xTwtIGFEWB7SXGdfZ/W/nDVcW 61GqosIvwzuoIJP+11K4nZJyIGOEHoqly5Q9BjZg80W4vom2AtTPAXogzwyzsBtRkOGTvgK/DSc4j Hk/3wK3SSfJUv3jd8DjQUJq/DhgGcGp4zCMVfuexK5cG3ggMQcGNCUdZQtlUITD84YGcwiTZM3NEl WuE2vBgCWN0OC+lAVxkPuoa8EOZ5IJCDvoLqLSifX+YNxImeyvDlC2zczOo/yqmgr+wL4ZoGUNYRw RlqQfcjSddFAuErbJf+C3/evRBFK0O3P8GJIRikSD6tHYF//DI1PAIqPB7Gys1M1y38W8GgQWrfMi QXo/QVz4Q==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1khzwS-0005f2-Kx; Wed, 25 Nov 2020 18:55:00 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1khzwQ-0005eM-AA for linux-arm-kernel@lists.infradead.org; Wed, 25 Nov 2020 18:54:59 +0000 Received: from localhost.localdomain (unknown [95.146.230.165]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 33CD020674; Wed, 25 Nov 2020 18:54:54 +0000 (UTC) From: Catalin Marinas To: Kostya Serebryany , Peter Collingbourne , Vincenzo Frascino , Dave Martin , Evgenii Stepanov , Will Deacon Subject: Re: [PATCH 1/2] kasan: arm64: set TCR_EL1.TBID1 when enabled Date: Wed, 25 Nov 2020 18:54:52 +0000 Message-Id: <160633041769.14178.5621643710037826918.b4-ty@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20f64e26fc8a1309caa446fffcb1b4e2fe9e229f.1605952129.git.pcc@google.com> References: <20f64e26fc8a1309caa446fffcb1b4e2fe9e229f.1605952129.git.pcc@google.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201125_135458_466449_CC543297 X-CRM114-Status: GOOD ( 10.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-api@vger.kernel.org, Linux ARM , Andrey Konovalov Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, 21 Nov 2020 01:59:02 -0800, Peter Collingbourne wrote: > On hardware supporting pointer authentication, we previously ended up > enabling TBI on instruction accesses when tag-based ASAN was enabled, > but this was costing us 8 bits of PAC entropy, which was unnecessary > since tag-based ASAN does not require TBI on instruction accesses. Get > them back by setting TCR_EL1.TBID1. Applied to arm64 (for-next/misc), thanks! [1/2] kasan: arm64: set TCR_EL1.TBID1 when enabled https://git.kernel.org/arm64/c/49b3cf035edc This patch looks safe. Patch 2/2 needs more discussions. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel