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From: Arnd Bergmann <arnd@kernel.org>
To: soc@kernel.org, Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: linux-arm-kernel@lists.infradead.org,
	Gregory CLEMENT <gregory.clement@bootlin.com>,
	linux-kernel@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>,
	Vladimir Zapolskiy <vz@mleia.com>
Subject: Re: [PATCH RESEND v2] ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
Date: Wed,  3 Feb 2021 13:31:34 +0100	[thread overview]
Message-ID: <161235548531.2002750.2897549125435385468.b4-ty@arndb.de> (raw)
In-Reply-To: <20210203090320.GA3760268@piout.net>

From: Arnd Bergmann <arnd@arndb.de>

On Wed, 3 Feb 2021 10:03:20 +0100, Alexandre Belloni wrote:
> This reverts commit c17e9377aa81664d94b4f2102559fcf2a01ec8e7.
> 
> The lpc32xx clock driver is not able to actually change the PLL rate as
> this would require reparenting ARM_CLK, DDRAM_CLK, PERIPH_CLK to SYSCLK,
> then stop the PLL, update the register, restart the PLL and wait for the
> PLL to lock and finally reparent ARM_CLK, DDRAM_CLK, PERIPH_CLK to HCLK
> PLL.
> 
> [...]

Applied to arm/fixes, thanks!

[1/1] ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
      commit: 5638159f6d93b99ec9743ac7f65563fca3cf413d

       Arnd

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  reply	other threads:[~2021-02-03 12:32 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-03  9:03 [PATCH RESEND v2] ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL Alexandre Belloni
2021-02-03 12:31 ` Arnd Bergmann [this message]
  -- strict thread matches above, loose matches on Subject: below --
2021-01-04  0:43 Alexandre Belloni

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