From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10136C433E0 for ; Sun, 14 Feb 2021 13:16:42 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BCEAC64D9A for ; Sun, 14 Feb 2021 13:16:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BCEAC64D9A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:References:In-Reply-To:Message-Id:Date:Subject:To: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=yp6csj4CLobhNcGn0Mv5MvP/Q1ZBypmZhJnnHv5oLp0=; b=SIA4Eid53q2kngA3GcHcbaFn0i MGv52aALRahfKIAVpwKz38kHMMBUuCLJP6c9kK3Y6Zsu6U6nYD56ESpIFfemasbiQ5YT7R/ICXhOI tG/uJrFpq0CuEWhsBXPugMkbj07h7GgEclRTa/hrfw+hBb/SIHOYVnFZbshe23pN5008lB1+6Zk2j 8+7mt/WSr/8tSMxuLIqGXNknQZSSooZ0TVrMKnQlvh6K6gXoiSXceEXLUiQ8joWxGwA2yRR9kcz8u WZWPAXs9GJXeTmgkzWNbh4EZ+029dEsQyNzu7/DxwRsIvt/BWk8RopQlms4/QUaBLSxJKRhPFq3i6 5B+eytFA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lBHFN-0001ww-Sc; Sun, 14 Feb 2021 13:15:33 +0000 Received: from mail-ej1-x62d.google.com ([2a00:1450:4864:20::62d]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1lBHFH-0001wW-Gs for linux-arm-kernel@lists.infradead.org; Sun, 14 Feb 2021 13:15:31 +0000 Received: by mail-ej1-x62d.google.com with SMTP id ot7so4263318ejb.9 for ; Sun, 14 Feb 2021 05:15:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=B9V1twMJcfS2rcxopt1zuCf8UB0K+VqSFD9Lylvuqvw=; b=emc0hOC+7SNYd6xFFKWFqEBMbgjwV5op7IMYc+Yo8xIm3B+fCZY6JqdMB1k47NOUyM doUkutH2IsBGDjjmkMXDUuRcuC5LgJ8ZmManeXUUimeVy6J2E5Nzri4Xnpg0lKhs8fdR gjyvoWiRqtyMVL+maxRj7/v2/iP7O7RlKbeLx6YpwlgcYDbXNHbj8gdUzi9k7iAcUUjN ZzANIiqGtjomdDPrNbZtJGgQIMC9mCQtxagC7LYlMdHkYKoJ+dvn98FUxSol0kG+xCtq sfydGq2HwMkNJoXhQSyhNJsvvHE+wUikbmcp7sGOOVk6YsueoV1vO76ac9Kn2zcLNr9I ff4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=B9V1twMJcfS2rcxopt1zuCf8UB0K+VqSFD9Lylvuqvw=; b=uWeHuthqaV5mRjHVG7zcnScDUS17+IILqz4q1utPJHWZOdw92JCCZ/Whpsfd0EUbQ9 XXCL+pj8XIPpvl/MDcGpKdRIdjSaj39o9wYpPKRf9xpVzvBFMVHDUYGHV8ooiZ8z32RW AxpDQS2hx4tLwHrHpsciM9aY8wQ6YcDghrjCRVG9fsE79Ywf2xKHc6upY6eV6yqP5+FU RDf77MyiWqFgeUuynMCiF2HomywxKLK0U2RFi6LT2lhhzueTemG+/FDvJ2X/ootVa8j0 g1kSPVzS1/HJpBEHCk3z0mpvGTtHMR6gVhCky7Dpr1ThBvas+usilVrP/bvYD3Nx8gMj 8XMw== X-Gm-Message-State: AOAM533t/b79mlfofy6Dg/dEHT8kpWqyaclIOoYlvH9w0L/L+u+3yATT az7IURS5Fb94COkA1iIM+ng= X-Google-Smtp-Source: ABdhPJwOvdR1gDkYSsj/BNKnKhBzjRah3AAHZDqaYV7EpW1P9Xrc44un7p/HW7KSn6buYUglSz8yuw== X-Received: by 2002:a17:906:1389:: with SMTP id f9mr11587000ejc.442.1613308526057; Sun, 14 Feb 2021 05:15:26 -0800 (PST) Received: from localhost (ipv6-31ee9f1acdb5aef4.ost.clients.hamburg.freifunk.net. [2a03:2267:4:0:31ee:9f1a:cdb5:aef4]) by smtp.gmail.com with ESMTPSA id ks13sm1839537ejb.69.2021.02.14.05.15.25 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sun, 14 Feb 2021 05:15:25 -0800 (PST) From: Oliver Graute To: shawnguo@kernel.org Subject: [PATCH v9 1/3] ARM: dts: imx6ul: Add Variscite DART-6UL SoM support Date: Sun, 14 Feb 2021 14:13:48 +0100 Message-Id: <1613308450-27958-2-git-send-email-oliver.graute@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1613308450-27958-1-git-send-email-oliver.graute@gmail.com> References: <1613308450-27958-1-git-send-email-oliver.graute@gmail.com> X-Patchwork-Bot: notify X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210214_081527_609162_87BDC402 X-CRM114-Status: GOOD ( 17.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Parthiban Nallathambi , narmstrong@baylibre.com, Sascha Hauer , m.felsch@pengutronix.de, linux-kernel@vger.kernel.org, Oliver Graute , Rob Herring , NXP Linux Team , Pengutronix Kernel Team , festevam@gmail.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patch adds support for the i.MX6UL variant of the Variscite DART-6UL SoM Carrier-Board Signed-off-by: Oliver Graute Cc: Shawn Guo Cc: Neil Armstrong Cc: Marco Felsch Cc: Parthiban Nallathambi --- .../boot/dts/imx6ul-imx6ull-var-dart-common.dtsi | 314 +++++++++++++++++++++ 1 file changed, 314 insertions(+) Changelog: v9: - added 3V and 5V regulator - move phy reset to subnode - added pwm-cells - fixed pad pin conflict v8: - remove can node - remove flexscan pinctrl - moved lcd and i2c pinctrl - sorted regulators - add dedicated pinctrl for dvfs regulator v7: - removed cpu0 node - fixed phy problem v6: - renamed touch regulator - renamed rmii clock - moved some muxing to baseboard - added pinctrl for gpio key - added bus-width to usdhc1 - fixed missing subnode on partitions create mode 100644 arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi diff --git a/arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi b/arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi new file mode 100644 index 00000000..b95fdc5 --- /dev/null +++ b/arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi @@ -0,0 +1,314 @@ +// SPDX-License-Identifier: (GPL-2.0) +/dts-v1/; + +#include "imx6ul.dtsi" +/ { + chosen { + stdout-path = &uart1; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; + + clk_rmii_ref: clock-rmii-ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + clock-output-names = "rmii-ref"; + }; + + reg_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_5v0: regulator-5v0 { + compatible = "regulator-fixed"; + regulator-name = "5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_gpio_dvfs: regulator-gpio { + compatible = "regulator-gpio"; + gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dvfs_reg>; + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1400000>; + regulator-name = "gpio_dvfs"; + regulator-type = "voltage"; + enable-active-high; + states = <1300000 0x1 1400000 0x0>; + }; + + reg_sd1_vmmc: regulator-sd1-vmmc { + compatible = "regulator-fixed"; + regulator-name = "VSD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_touch_3v3: regulator-touch-3v3 { + compatible = "regulator-fixed"; + regulator-name = "touch_3v3_supply"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + +}; + +&adc1 { + vref-supply = <®_touch_3v3>; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + micrel,rmii-reference-clock-select-25-mhz; + clocks = <&clk_rmii_ref>; + clock-names = "rmii-ref"; + reset-names = "phy"; + reset-gpios=<&gpio5 10 1>; + reset-assert-us = <100>; + reg = <1>; + }; + + ethphy1: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c22"; + micrel,rmii-reference-clock-select-25-mhz; + clocks = <&clk_rmii_ref>; + clock-names = "rmii-ref"; + reg = <3>; + }; + }; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; +}; + +&pwm1 { + #pwm-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; +}; + +&sai2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai2>; + assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>, + <&clks IMX6UL_CLK_SAI2>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; + assigned-clock-rates = <0>, <12288000>; + fsl,sai-mclk-direction-output; + status = "okay"; +}; + +&snvs_poweroff { + status = "okay"; +}; + +&snvs_rtc { + status = "disabled"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + uart-has-rtscts; +}; + +&usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + bus-width = <4>; + no-1-8-v; + keep-power-in-suspend; + vmmc-supply = <®_sd1_vmmc>; + non-removable; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + pinctrl_enet1: enet1grp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + >; + }; + + pinctrl_enet2: enet2grp { + fsl,pins = < + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 + MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x1b0b0 + >; + }; + + pinctrl_gpmi_nand: gpminandgrp { + fsl,pins = < + MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1 + MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1 + MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1 + MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000 + MX6UL_PAD_NAND_CE1_B__RAWNAND_CE1_B 0xb0b1 + MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1 + MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1 + MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1 + MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1 + MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1 + MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1 + MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1 + MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1 + MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1 + MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1 + >; + }; + + pinctrl_hog: hoggrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x03029 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__PWM1_OUT 0x110b0 + >; + }; + + pinctrl_sai2: sai2grp { + fsl,pins = < + MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 + MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 + MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088 + MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088 + MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088 + >; + }; + + pinctrl_dvfs_reg: dvfs-grp { + fsl,pins = < + MX6UL_PAD_NAND_CE0_B__GPIO4_IO13 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 + MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1 + MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS 0x1b0b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1 + MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1 + MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1 + MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x17059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b0b1 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b0b1 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b0b1 + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO08__WDOG1_WDOG_B 0x78b0 + >; + }; +}; -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel