[PATCH v2 0/9] drivers/perf: Use general macro to simplify event attributes

[PATCH v2 0/9] drivers/perf: Use general macro to simplify event attributes

[Qi Liu]

This patchset apply a general EVENT_ATTR_ID to simplify event
attributes in many PMU drivers.

Qi Liu (9):
  perf: Add EVENT_ATTR_ID to simplify event attributes
  drivers/perf: hisi: Remove redundant macro and functions
  drivers/perf: Remove redundant macro and functions in arm_smmuv3_pmu.c
  drivers/perf: Remove redundant macro and functions in qcom_l2_pmu.c
  drivers/perf: Remove redundant macro and functions in qcom_l3_pmu.c
  drivers/perf: Remove redundant macro and functions in xgene_pmu.c
  drivers/perf: Remove redundant macro and functions in fsl_imx8_ddr_perf.c
  drivers/perf: Remove redundant macro and functions in arm_dsu_pmu.c
  arm64: perf: Remove redundant macro and functions in perf_event.c

 arch/arm64/kernel/perf_event.c                | 175 +++++-----
 drivers/perf/arm_dsu_pmu.c                    |  28 +-
 drivers/perf/arm_smmuv3_pmu.c                 |  33 +-
 drivers/perf/fsl_imx8_ddr_perf.c              |  80 ++---
 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c |  22 +-
 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c  |  62 ++--
 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c  |  34 +-
 drivers/perf/hisilicon/hisi_uncore_pa_pmu.c   |   6 +-
 drivers/perf/hisilicon/hisi_uncore_pmu.c      |  14 -
 drivers/perf/hisilicon/hisi_uncore_pmu.h      |   2 -
 drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c |  10 +-
 drivers/perf/qcom_l2_pmu.c                    |  37 +-
 drivers/perf/qcom_l3_pmu.c                    |  30 +-
 drivers/perf/xgene_pmu.c                      | 475 +++++++++++++-------------
 include/linux/perf_event.h                    |   6 +
 kernel/events/core.c                          |   2 +
 16 files changed, 450 insertions(+), 566 deletions(-)

-- 
2.7.4


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[PATCH v2 1/9] perf: Add EVENT_ATTR_ID to simplify event attributes

[Qi Liu]

Similar EVENT_ATTR macros are defined in many PMU drivers,
like HiSilicon PMU driver, Arm PMU driver, Arm SMMU PMU
driver. So Add a generic macro to simplify code.

Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
---
 include/linux/perf_event.h | 6 ++++++
 kernel/events/core.c       | 2 ++
 2 files changed, 8 insertions(+)

diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index f5a6a2f..d0aa74e 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -1576,6 +1576,12 @@ static struct perf_pmu_events_attr _var = {				    \
 	.event_str	= _str,						    \
 };
 
+#define PMU_EVENT_ATTR_ID(_name, _id)					     \
+	(&((struct perf_pmu_events_attr[]) {				     \
+		{ .attr = __ATTR(_name, 0444, perf_event_sysfs_show, NULL),  \
+		  .id = _id, }						     \
+	})[0].attr.attr)
+
 #define PMU_FORMAT_ATTR(_name, _format)					\
 static ssize_t								\
 _name##_show(struct device *dev,					\
diff --git a/kernel/events/core.c b/kernel/events/core.c
index 0ac818b..330d9cc 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -13295,6 +13295,8 @@ ssize_t perf_event_sysfs_show(struct device *dev, struct device_attribute *attr,
 
 	if (pmu_attr->event_str)
 		return sprintf(page, "%s\n", pmu_attr->event_str);
+	else
+		return sprintf(page, "config=%#llx\n", pmu_attr->id);
 
 	return 0;
 }
-- 
2.7.4


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[PATCH v2 2/9] drivers/perf: hisi: Remove redundant macro and functions

[Qi Liu]

Remove HISI_PMU_EVENT_ATTR and hisi_event_sysfs_show(), as we have
a general function for this.

Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
---
 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 22 +++++-----
 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c  | 62 +++++++++++++--------------
 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c  | 34 +++++++--------
 drivers/perf/hisilicon/hisi_uncore_pa_pmu.c   |  6 +--
 drivers/perf/hisilicon/hisi_uncore_pmu.c      | 14 ------
 drivers/perf/hisilicon/hisi_uncore_pmu.h      |  2 -
 drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c | 10 ++---
 7 files changed, 67 insertions(+), 83 deletions(-)

diff --git a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
index 7c8a4bc..e3f4bb0 100644
--- a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
@@ -354,14 +354,14 @@ static const struct attribute_group hisi_ddrc_pmu_v2_format_group = {
 };
 
 static struct attribute *hisi_ddrc_pmu_v1_events_attr[] = {
-	HISI_PMU_EVENT_ATTR(flux_wr,		0x00),
-	HISI_PMU_EVENT_ATTR(flux_rd,		0x01),
-	HISI_PMU_EVENT_ATTR(flux_wcmd,		0x02),
-	HISI_PMU_EVENT_ATTR(flux_rcmd,		0x03),
-	HISI_PMU_EVENT_ATTR(pre_cmd,		0x04),
-	HISI_PMU_EVENT_ATTR(act_cmd,		0x05),
-	HISI_PMU_EVENT_ATTR(rnk_chg,		0x06),
-	HISI_PMU_EVENT_ATTR(rw_chg,		0x07),
+	PMU_EVENT_ATTR_ID(flux_wr,		0x00),
+	PMU_EVENT_ATTR_ID(flux_rd,		0x01),
+	PMU_EVENT_ATTR_ID(flux_wcmd,		0x02),
+	PMU_EVENT_ATTR_ID(flux_rcmd,		0x03),
+	PMU_EVENT_ATTR_ID(pre_cmd,		0x04),
+	PMU_EVENT_ATTR_ID(act_cmd,		0x05),
+	PMU_EVENT_ATTR_ID(rnk_chg,		0x06),
+	PMU_EVENT_ATTR_ID(rw_chg,		0x07),
 	NULL,
 };
 
@@ -371,9 +371,9 @@ static const struct attribute_group hisi_ddrc_pmu_v1_events_group = {
 };
 
 static struct attribute *hisi_ddrc_pmu_v2_events_attr[] = {
-	HISI_PMU_EVENT_ATTR(cycles,		0x00),
-	HISI_PMU_EVENT_ATTR(flux_wr,		0x83),
-	HISI_PMU_EVENT_ATTR(flux_rd,		0x84),
+	PMU_EVENT_ATTR_ID(cycles,		0x00),
+	PMU_EVENT_ATTR_ID(flux_wr,		0x83),
+	PMU_EVENT_ATTR_ID(flux_rd,		0x84),
 	NULL
 };
 
diff --git a/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c b/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
index 0316fab..13701b7 100644
--- a/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
@@ -359,32 +359,32 @@ static const struct attribute_group hisi_hha_pmu_v2_format_group = {
 };
 
 static struct attribute *hisi_hha_pmu_v1_events_attr[] = {
-	HISI_PMU_EVENT_ATTR(rx_ops_num,		0x00),
-	HISI_PMU_EVENT_ATTR(rx_outer,		0x01),
-	HISI_PMU_EVENT_ATTR(rx_sccl,		0x02),
-	HISI_PMU_EVENT_ATTR(rx_ccix,		0x03),
-	HISI_PMU_EVENT_ATTR(rx_wbi,		0x04),
-	HISI_PMU_EVENT_ATTR(rx_wbip,		0x05),
-	HISI_PMU_EVENT_ATTR(rx_wtistash,	0x11),
-	HISI_PMU_EVENT_ATTR(rd_ddr_64b,		0x1c),
-	HISI_PMU_EVENT_ATTR(wr_ddr_64b,		0x1d),
-	HISI_PMU_EVENT_ATTR(rd_ddr_128b,	0x1e),
-	HISI_PMU_EVENT_ATTR(wr_ddr_128b,	0x1f),
-	HISI_PMU_EVENT_ATTR(spill_num,		0x20),
-	HISI_PMU_EVENT_ATTR(spill_success,	0x21),
-	HISI_PMU_EVENT_ATTR(bi_num,		0x23),
-	HISI_PMU_EVENT_ATTR(mediated_num,	0x32),
-	HISI_PMU_EVENT_ATTR(tx_snp_num,		0x33),
-	HISI_PMU_EVENT_ATTR(tx_snp_outer,	0x34),
-	HISI_PMU_EVENT_ATTR(tx_snp_ccix,	0x35),
-	HISI_PMU_EVENT_ATTR(rx_snprspdata,	0x38),
-	HISI_PMU_EVENT_ATTR(rx_snprsp_outer,	0x3c),
-	HISI_PMU_EVENT_ATTR(sdir-lookup,	0x40),
-	HISI_PMU_EVENT_ATTR(edir-lookup,	0x41),
-	HISI_PMU_EVENT_ATTR(sdir-hit,		0x42),
-	HISI_PMU_EVENT_ATTR(edir-hit,		0x43),
-	HISI_PMU_EVENT_ATTR(sdir-home-migrate,	0x4c),
-	HISI_PMU_EVENT_ATTR(edir-home-migrate,  0x4d),
+	PMU_EVENT_ATTR_ID(rx_ops_num,		0x00),
+	PMU_EVENT_ATTR_ID(rx_outer,		0x01),
+	PMU_EVENT_ATTR_ID(rx_sccl,		0x02),
+	PMU_EVENT_ATTR_ID(rx_ccix,		0x03),
+	PMU_EVENT_ATTR_ID(rx_wbi,		0x04),
+	PMU_EVENT_ATTR_ID(rx_wbip,		0x05),
+	PMU_EVENT_ATTR_ID(rx_wtistash,		0x11),
+	PMU_EVENT_ATTR_ID(rd_ddr_64b,		0x1c),
+	PMU_EVENT_ATTR_ID(wr_ddr_64b,		0x1d),
+	PMU_EVENT_ATTR_ID(rd_ddr_128b,		0x1e),
+	PMU_EVENT_ATTR_ID(wr_ddr_128b,		0x1f),
+	PMU_EVENT_ATTR_ID(spill_num,		0x20),
+	PMU_EVENT_ATTR_ID(spill_success,	0x21),
+	PMU_EVENT_ATTR_ID(bi_num,		0x23),
+	PMU_EVENT_ATTR_ID(mediated_num,		0x32),
+	PMU_EVENT_ATTR_ID(tx_snp_num,		0x33),
+	PMU_EVENT_ATTR_ID(tx_snp_outer,		0x34),
+	PMU_EVENT_ATTR_ID(tx_snp_ccix,		0x35),
+	PMU_EVENT_ATTR_ID(rx_snprspdata,	0x38),
+	PMU_EVENT_ATTR_ID(rx_snprsp_outer,	0x3c),
+	PMU_EVENT_ATTR_ID(sdir-lookup,		0x40),
+	PMU_EVENT_ATTR_ID(edir-lookup,		0x41),
+	PMU_EVENT_ATTR_ID(sdir-hit,		0x42),
+	PMU_EVENT_ATTR_ID(edir-hit,		0x43),
+	PMU_EVENT_ATTR_ID(sdir-home-migrate,	0x4c),
+	PMU_EVENT_ATTR_ID(edir-home-migrate,	0x4d),
 	NULL,
 };
 
@@ -394,11 +394,11 @@ static const struct attribute_group hisi_hha_pmu_v1_events_group = {
 };
 
 static struct attribute *hisi_hha_pmu_v2_events_attr[] = {
-	HISI_PMU_EVENT_ATTR(rx_ops_num,		0x00),
-	HISI_PMU_EVENT_ATTR(rx_outer,		0x01),
-	HISI_PMU_EVENT_ATTR(rx_sccl,		0x02),
-	HISI_PMU_EVENT_ATTR(hha_retry,		0x2e),
-	HISI_PMU_EVENT_ATTR(cycles,		0x55),
+	PMU_EVENT_ATTR_ID(rx_ops_num,		0x00),
+	PMU_EVENT_ATTR_ID(rx_outer,		0x01),
+	PMU_EVENT_ATTR_ID(rx_sccl,		0x02),
+	PMU_EVENT_ATTR_ID(hha_retry,		0x2e),
+	PMU_EVENT_ATTR_ID(cycles,		0x55),
 	NULL
 };
 
diff --git a/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c b/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
index bf9f777..e96d1ee 100644
--- a/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
@@ -407,19 +407,19 @@ static const struct attribute_group hisi_l3c_pmu_v2_format_group = {
 };
 
 static struct attribute *hisi_l3c_pmu_v1_events_attr[] = {
-	HISI_PMU_EVENT_ATTR(rd_cpipe,		0x00),
-	HISI_PMU_EVENT_ATTR(wr_cpipe,		0x01),
-	HISI_PMU_EVENT_ATTR(rd_hit_cpipe,	0x02),
-	HISI_PMU_EVENT_ATTR(wr_hit_cpipe,	0x03),
-	HISI_PMU_EVENT_ATTR(victim_num,		0x04),
-	HISI_PMU_EVENT_ATTR(rd_spipe,		0x20),
-	HISI_PMU_EVENT_ATTR(wr_spipe,		0x21),
-	HISI_PMU_EVENT_ATTR(rd_hit_spipe,	0x22),
-	HISI_PMU_EVENT_ATTR(wr_hit_spipe,	0x23),
-	HISI_PMU_EVENT_ATTR(back_invalid,	0x29),
-	HISI_PMU_EVENT_ATTR(retry_cpu,		0x40),
-	HISI_PMU_EVENT_ATTR(retry_ring,		0x41),
-	HISI_PMU_EVENT_ATTR(prefetch_drop,	0x42),
+	PMU_EVENT_ATTR_ID(rd_cpipe,		0x00),
+	PMU_EVENT_ATTR_ID(wr_cpipe,		0x01),
+	PMU_EVENT_ATTR_ID(rd_hit_cpipe,	0x02),
+	PMU_EVENT_ATTR_ID(wr_hit_cpipe,	0x03),
+	PMU_EVENT_ATTR_ID(victim_num,		0x04),
+	PMU_EVENT_ATTR_ID(rd_spipe,		0x20),
+	PMU_EVENT_ATTR_ID(wr_spipe,		0x21),
+	PMU_EVENT_ATTR_ID(rd_hit_spipe,	0x22),
+	PMU_EVENT_ATTR_ID(wr_hit_spipe,	0x23),
+	PMU_EVENT_ATTR_ID(back_invalid,	0x29),
+	PMU_EVENT_ATTR_ID(retry_cpu,		0x40),
+	PMU_EVENT_ATTR_ID(retry_ring,		0x41),
+	PMU_EVENT_ATTR_ID(prefetch_drop,	0x42),
 	NULL,
 };
 
@@ -429,10 +429,10 @@ static const struct attribute_group hisi_l3c_pmu_v1_events_group = {
 };
 
 static struct attribute *hisi_l3c_pmu_v2_events_attr[] = {
-	HISI_PMU_EVENT_ATTR(l3c_hit,		0x48),
-	HISI_PMU_EVENT_ATTR(cycles,		0x7f),
-	HISI_PMU_EVENT_ATTR(l3c_ref,		0xb8),
-	HISI_PMU_EVENT_ATTR(dat_access,		0xb9),
+	PMU_EVENT_ATTR_ID(l3c_hit,		0x48),
+	PMU_EVENT_ATTR_ID(cycles,		0x7f),
+	PMU_EVENT_ATTR_ID(l3c_ref,		0xb8),
+	PMU_EVENT_ATTR_ID(dat_access,		0xb9),
 	NULL
 };
 
diff --git a/drivers/perf/hisilicon/hisi_uncore_pa_pmu.c b/drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
index 14f23eb..0eb68bc 100644
--- a/drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
@@ -303,9 +303,9 @@ static const struct attribute_group hisi_pa_pmu_v2_format_group = {
 };
 
 static struct attribute *hisi_pa_pmu_v2_events_attr[] = {
-	HISI_PMU_EVENT_ATTR(rx_req,		0x40),
-	HISI_PMU_EVENT_ATTR(tx_req,             0x5c),
-	HISI_PMU_EVENT_ATTR(cycle,		0x78),
+	PMU_EVENT_ATTR_ID(rx_req,		0x40),
+	PMU_EVENT_ATTR_ID(tx_req,             0x5c),
+	PMU_EVENT_ATTR_ID(cycle,		0x78),
 	NULL
 };
 
diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.c b/drivers/perf/hisilicon/hisi_uncore_pmu.c
index 13c68b5..c0be073 100644
--- a/drivers/perf/hisilicon/hisi_uncore_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_pmu.c
@@ -38,20 +38,6 @@ ssize_t hisi_format_sysfs_show(struct device *dev,
 EXPORT_SYMBOL_GPL(hisi_format_sysfs_show);
 
 /*
- * PMU event attributes
- */
-ssize_t hisi_event_sysfs_show(struct device *dev,
-			      struct device_attribute *attr, char *page)
-{
-	struct dev_ext_attribute *eattr;
-
-	eattr = container_of(attr, struct dev_ext_attribute, attr);
-
-	return sysfs_emit(page, "config=0x%lx\n", (unsigned long)eattr->var);
-}
-EXPORT_SYMBOL_GPL(hisi_event_sysfs_show);
-
-/*
  * sysfs cpumask attributes. For uncore PMU, we only have a single CPU to show
  */
 ssize_t hisi_cpumask_sysfs_show(struct device *dev,
diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.h b/drivers/perf/hisilicon/hisi_uncore_pmu.h
index ea9d89b..6eb023f 100644
--- a/drivers/perf/hisilicon/hisi_uncore_pmu.h
+++ b/drivers/perf/hisilicon/hisi_uncore_pmu.h
@@ -34,8 +34,6 @@
 
 #define HISI_PMU_FORMAT_ATTR(_name, _config)		\
 	HISI_PMU_ATTR(_name, hisi_format_sysfs_show, (void *)_config)
-#define HISI_PMU_EVENT_ATTR(_name, _config)		\
-	HISI_PMU_ATTR(_name, hisi_event_sysfs_show, (unsigned long)_config)
 
 #define HISI_PMU_EVENT_ATTR_EXTRACTOR(name, config, hi, lo)        \
 	static inline u32 hisi_get_##name(struct perf_event *event)            \
diff --git a/drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c b/drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
index 46be312..31ee010 100644
--- a/drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
@@ -334,11 +334,11 @@ static const struct attribute_group hisi_sllc_pmu_v2_format_group = {
 };
 
 static struct attribute *hisi_sllc_pmu_v2_events_attr[] = {
-	HISI_PMU_EVENT_ATTR(rx_req,             0x30),
-	HISI_PMU_EVENT_ATTR(rx_data,            0x31),
-	HISI_PMU_EVENT_ATTR(tx_req,             0x34),
-	HISI_PMU_EVENT_ATTR(tx_data,            0x35),
-	HISI_PMU_EVENT_ATTR(cycles,             0x09),
+	PMU_EVENT_ATTR_ID(rx_req,             0x30),
+	PMU_EVENT_ATTR_ID(rx_data,            0x31),
+	PMU_EVENT_ATTR_ID(tx_req,             0x34),
+	PMU_EVENT_ATTR_ID(tx_data,            0x35),
+	PMU_EVENT_ATTR_ID(cycles,             0x09),
 	NULL
 };
 
-- 
2.7.4


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[PATCH v2 3/9] drivers/perf: Remove redundant macro and functions in SMMU PMU driver

[Qi Liu]

Remove SMMU_EVENT_ATTR and smmu_event_sysfs_show(), as there is
a general function for this.

Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
---
 drivers/perf/arm_smmuv3_pmu.c | 33 ++++++++-------------------------
 1 file changed, 8 insertions(+), 25 deletions(-)

diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c
index ff6fab4..9d745a1 100644
--- a/drivers/perf/arm_smmuv3_pmu.c
+++ b/drivers/perf/arm_smmuv3_pmu.c
@@ -498,32 +498,15 @@ static const struct attribute_group smmu_pmu_cpumask_group = {
 };
 
 /* Events */
-
-static ssize_t smmu_pmu_event_show(struct device *dev,
-				   struct device_attribute *attr, char *page)
-{
-	struct perf_pmu_events_attr *pmu_attr;
-
-	pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr);
-
-	return sysfs_emit(page, "event=0x%02llx\n", pmu_attr->id);
-}
-
-#define SMMU_EVENT_ATTR(name, config)					\
-	(&((struct perf_pmu_events_attr) {				\
-		.attr = __ATTR(name, 0444, smmu_pmu_event_show, NULL),	\
-		.id = config,						\
-	}).attr.attr)
-
 static struct attribute *smmu_pmu_events[] = {
-	SMMU_EVENT_ATTR(cycles, 0),
-	SMMU_EVENT_ATTR(transaction, 1),
-	SMMU_EVENT_ATTR(tlb_miss, 2),
-	SMMU_EVENT_ATTR(config_cache_miss, 3),
-	SMMU_EVENT_ATTR(trans_table_walk_access, 4),
-	SMMU_EVENT_ATTR(config_struct_access, 5),
-	SMMU_EVENT_ATTR(pcie_ats_trans_rq, 6),
-	SMMU_EVENT_ATTR(pcie_ats_trans_passed, 7),
+	PMU_EVENT_ATTR_ID(cycles, 0),
+	PMU_EVENT_ATTR_ID(transaction, 1),
+	PMU_EVENT_ATTR_ID(tlb_miss, 2),
+	PMU_EVENT_ATTR_ID(config_cache_miss, 3),
+	PMU_EVENT_ATTR_ID(trans_table_walk_access, 4),
+	PMU_EVENT_ATTR_ID(config_struct_access, 5),
+	PMU_EVENT_ATTR_ID(pcie_ats_trans_rq, 6),
+	PMU_EVENT_ATTR_ID(pcie_ats_trans_passed, 7),
 	NULL
 };
 
-- 
2.7.4


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[PATCH v2 4/9] drivers/perf: Remove redundant macro and functions in qcom_l2_pmu.c

[Qi Liu]

Remove L2CACHE_EVENT_ATTR and l2cache_pmu_event_show(), as there is
a general function for this.

Cc: Andy Gross <agross@kernel.org>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
---
 drivers/perf/qcom_l2_pmu.c | 37 +++++++++++--------------------------
 1 file changed, 11 insertions(+), 26 deletions(-)

diff --git a/drivers/perf/qcom_l2_pmu.c b/drivers/perf/qcom_l2_pmu.c
index fc54a80..aa3ae21 100644
--- a/drivers/perf/qcom_l2_pmu.c
+++ b/drivers/perf/qcom_l2_pmu.c
@@ -670,33 +670,18 @@ static const struct attribute_group l2_cache_pmu_format_group = {
 	.attrs = l2_cache_pmu_formats,
 };
 
-static ssize_t l2cache_pmu_event_show(struct device *dev,
-				      struct device_attribute *attr, char *page)
-{
-	struct perf_pmu_events_attr *pmu_attr;
-
-	pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr);
-	return sysfs_emit(page, "event=0x%02llx\n", pmu_attr->id);
-}
-
-#define L2CACHE_EVENT_ATTR(_name, _id)					     \
-	(&((struct perf_pmu_events_attr[]) {				     \
-		{ .attr = __ATTR(_name, 0444, l2cache_pmu_event_show, NULL), \
-		  .id = _id, }						     \
-	})[0].attr.attr)
-
 static struct attribute *l2_cache_pmu_events[] = {
-	L2CACHE_EVENT_ATTR(cycles, L2_EVENT_CYCLES),
-	L2CACHE_EVENT_ATTR(dcache-ops, L2_EVENT_DCACHE_OPS),
-	L2CACHE_EVENT_ATTR(icache-ops, L2_EVENT_ICACHE_OPS),
-	L2CACHE_EVENT_ATTR(tlbi, L2_EVENT_TLBI),
-	L2CACHE_EVENT_ATTR(barriers, L2_EVENT_BARRIERS),
-	L2CACHE_EVENT_ATTR(total-reads, L2_EVENT_TOTAL_READS),
-	L2CACHE_EVENT_ATTR(total-writes, L2_EVENT_TOTAL_WRITES),
-	L2CACHE_EVENT_ATTR(total-requests, L2_EVENT_TOTAL_REQUESTS),
-	L2CACHE_EVENT_ATTR(ldrex, L2_EVENT_LDREX),
-	L2CACHE_EVENT_ATTR(strex, L2_EVENT_STREX),
-	L2CACHE_EVENT_ATTR(clrex, L2_EVENT_CLREX),
+	PMU_EVENT_ATTR_ID(cycles, L2_EVENT_CYCLES),
+	PMU_EVENT_ATTR_ID(dcache-ops, L2_EVENT_DCACHE_OPS),
+	PMU_EVENT_ATTR_ID(icache-ops, L2_EVENT_ICACHE_OPS),
+	PMU_EVENT_ATTR_ID(tlbi, L2_EVENT_TLBI),
+	PMU_EVENT_ATTR_ID(barriers, L2_EVENT_BARRIERS),
+	PMU_EVENT_ATTR_ID(total-reads, L2_EVENT_TOTAL_READS),
+	PMU_EVENT_ATTR_ID(total-writes, L2_EVENT_TOTAL_WRITES),
+	PMU_EVENT_ATTR_ID(total-requests, L2_EVENT_TOTAL_REQUESTS),
+	PMU_EVENT_ATTR_ID(ldrex, L2_EVENT_LDREX),
+	PMU_EVENT_ATTR_ID(strex, L2_EVENT_STREX),
+	PMU_EVENT_ATTR_ID(clrex, L2_EVENT_CLREX),
 	NULL
 };
 
-- 
2.7.4


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[PATCH v2 5/9] drivers/perf: Remove redundant macro and functions in qcom_l3_pmu.c

[Qi Liu]

Remove L3CACHE_EVENT_ATTR and l3cache_pmu_event_show(), as there is
a general function for this.

Cc: Andy Gross <agross@kernel.org>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
---
 drivers/perf/qcom_l3_pmu.c | 30 +++++++-----------------------
 1 file changed, 7 insertions(+), 23 deletions(-)

diff --git a/drivers/perf/qcom_l3_pmu.c b/drivers/perf/qcom_l3_pmu.c
index bba0780..a163c9a 100644
--- a/drivers/perf/qcom_l3_pmu.c
+++ b/drivers/perf/qcom_l3_pmu.c
@@ -636,30 +636,14 @@ static const struct attribute_group qcom_l3_cache_pmu_format_group = {
 };
 
 /* events */
-
-static ssize_t l3cache_pmu_event_show(struct device *dev,
-				     struct device_attribute *attr, char *page)
-{
-	struct perf_pmu_events_attr *pmu_attr;
-
-	pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr);
-	return sysfs_emit(page, "event=0x%02llx\n", pmu_attr->id);
-}
-
-#define L3CACHE_EVENT_ATTR(_name, _id)					     \
-	(&((struct perf_pmu_events_attr[]) {				     \
-		{ .attr = __ATTR(_name, 0444, l3cache_pmu_event_show, NULL), \
-		  .id = _id, }						     \
-	})[0].attr.attr)
-
 static struct attribute *qcom_l3_cache_pmu_events[] = {
-	L3CACHE_EVENT_ATTR(cycles, L3_EVENT_CYCLES),
-	L3CACHE_EVENT_ATTR(read-hit, L3_EVENT_READ_HIT),
-	L3CACHE_EVENT_ATTR(read-miss, L3_EVENT_READ_MISS),
-	L3CACHE_EVENT_ATTR(read-hit-d-side, L3_EVENT_READ_HIT_D),
-	L3CACHE_EVENT_ATTR(read-miss-d-side, L3_EVENT_READ_MISS_D),
-	L3CACHE_EVENT_ATTR(write-hit, L3_EVENT_WRITE_HIT),
-	L3CACHE_EVENT_ATTR(write-miss, L3_EVENT_WRITE_MISS),
+	PMU_EVENT_ATTR_ID(cycles, L3_EVENT_CYCLES),
+	PMU_EVENT_ATTR_ID(read-hit, L3_EVENT_READ_HIT),
+	PMU_EVENT_ATTR_ID(read-miss, L3_EVENT_READ_MISS),
+	PMU_EVENT_ATTR_ID(read-hit-d-side, L3_EVENT_READ_HIT_D),
+	PMU_EVENT_ATTR_ID(read-miss-d-side, L3_EVENT_READ_MISS_D),
+	PMU_EVENT_ATTR_ID(write-hit, L3_EVENT_WRITE_HIT),
+	PMU_EVENT_ATTR_ID(write-miss, L3_EVENT_WRITE_MISS),
 	NULL
 };
 
-- 
2.7.4


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[PATCH v2 6/9] drivers/perf: Remove redundant macro and functions in xgene_pmu.c

[Qi Liu]

Remove XGENE_PMU_EVENT_ATTR and xgene_pmu_event_show(), as there is
a general function for this.

Cc: Khuong Dinh <khuong@os.amperecomputing.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
---
 drivers/perf/xgene_pmu.c | 475 +++++++++++++++++++++++------------------------
 1 file changed, 230 insertions(+), 245 deletions(-)

diff --git a/drivers/perf/xgene_pmu.c b/drivers/perf/xgene_pmu.c
index ffe3bde..3da6599 100644
--- a/drivers/perf/xgene_pmu.c
+++ b/drivers/perf/xgene_pmu.c
@@ -275,96 +275,81 @@ static const struct attribute_group mc_pmu_v3_format_attr_group = {
 /*
  * sysfs event attributes
  */
-static ssize_t xgene_pmu_event_show(struct device *dev,
-				    struct device_attribute *attr, char *buf)
-{
-	struct dev_ext_attribute *eattr;
-
-	eattr = container_of(attr, struct dev_ext_attribute, attr);
-	return sysfs_emit(buf, "config=0x%lx\n", (unsigned long) eattr->var);
-}
-
-#define XGENE_PMU_EVENT_ATTR(_name, _config)		\
-	(&((struct dev_ext_attribute[]) {		\
-		{ .attr = __ATTR(_name, S_IRUGO, xgene_pmu_event_show, NULL), \
-		  .var = (void *) _config, }		\
-	 })[0].attr.attr)
-
 static struct attribute *l3c_pmu_events_attrs[] = {
-	XGENE_PMU_EVENT_ATTR(cycle-count,			0x00),
-	XGENE_PMU_EVENT_ATTR(cycle-count-div-64,		0x01),
-	XGENE_PMU_EVENT_ATTR(read-hit,				0x02),
-	XGENE_PMU_EVENT_ATTR(read-miss,				0x03),
-	XGENE_PMU_EVENT_ATTR(write-need-replacement,		0x06),
-	XGENE_PMU_EVENT_ATTR(write-not-need-replacement,	0x07),
-	XGENE_PMU_EVENT_ATTR(tq-full,				0x08),
-	XGENE_PMU_EVENT_ATTR(ackq-full,				0x09),
-	XGENE_PMU_EVENT_ATTR(wdb-full,				0x0a),
-	XGENE_PMU_EVENT_ATTR(bank-fifo-full,			0x0b),
-	XGENE_PMU_EVENT_ATTR(odb-full,				0x0c),
-	XGENE_PMU_EVENT_ATTR(wbq-full,				0x0d),
-	XGENE_PMU_EVENT_ATTR(bank-conflict-fifo-issue,		0x0e),
-	XGENE_PMU_EVENT_ATTR(bank-fifo-issue,			0x0f),
+	PMU_EVENT_ATTR_ID(cycle-count,			0x00),
+	PMU_EVENT_ATTR_ID(cycle-count-div-64,		0x01),
+	PMU_EVENT_ATTR_ID(read-hit,			0x02),
+	PMU_EVENT_ATTR_ID(read-miss,			0x03),
+	PMU_EVENT_ATTR_ID(write-need-replacement,	0x06),
+	PMU_EVENT_ATTR_ID(write-not-need-replacement,	0x07),
+	PMU_EVENT_ATTR_ID(tq-full,			0x08),
+	PMU_EVENT_ATTR_ID(ackq-full,			0x09),
+	PMU_EVENT_ATTR_ID(wdb-full,			0x0a),
+	PMU_EVENT_ATTR_ID(bank-fifo-full,		0x0b),
+	PMU_EVENT_ATTR_ID(odb-full,			0x0c),
+	PMU_EVENT_ATTR_ID(wbq-full,			0x0d),
+	PMU_EVENT_ATTR_ID(bank-conflict-fifo-issue,	0x0e),
+	PMU_EVENT_ATTR_ID(bank-fifo-issue,		0x0f),
 	NULL,
 };
 
 static struct attribute *iob_pmu_events_attrs[] = {
-	XGENE_PMU_EVENT_ATTR(cycle-count,			0x00),
-	XGENE_PMU_EVENT_ATTR(cycle-count-div-64,		0x01),
-	XGENE_PMU_EVENT_ATTR(axi0-read,				0x02),
-	XGENE_PMU_EVENT_ATTR(axi0-read-partial,			0x03),
-	XGENE_PMU_EVENT_ATTR(axi1-read,				0x04),
-	XGENE_PMU_EVENT_ATTR(axi1-read-partial,			0x05),
-	XGENE_PMU_EVENT_ATTR(csw-read-block,			0x06),
-	XGENE_PMU_EVENT_ATTR(csw-read-partial,			0x07),
-	XGENE_PMU_EVENT_ATTR(axi0-write,			0x10),
-	XGENE_PMU_EVENT_ATTR(axi0-write-partial,		0x11),
-	XGENE_PMU_EVENT_ATTR(axi1-write,			0x13),
-	XGENE_PMU_EVENT_ATTR(axi1-write-partial,		0x14),
-	XGENE_PMU_EVENT_ATTR(csw-inbound-dirty,			0x16),
+	PMU_EVENT_ATTR_ID(cycle-count,			0x00),
+	PMU_EVENT_ATTR_ID(cycle-count-div-64,		0x01),
+	PMU_EVENT_ATTR_ID(axi0-read,			0x02),
+	PMU_EVENT_ATTR_ID(axi0-read-partial,		0x03),
+	PMU_EVENT_ATTR_ID(axi1-read,			0x04),
+	PMU_EVENT_ATTR_ID(axi1-read-partial,		0x05),
+	PMU_EVENT_ATTR_ID(csw-read-block,		0x06),
+	PMU_EVENT_ATTR_ID(csw-read-partial,		0x07),
+	PMU_EVENT_ATTR_ID(axi0-write,			0x10),
+	PMU_EVENT_ATTR_ID(axi0-write-partial,		0x11),
+	PMU_EVENT_ATTR_ID(axi1-write,			0x13),
+	PMU_EVENT_ATTR_ID(axi1-write-partial,		0x14),
+	PMU_EVENT_ATTR_ID(csw-inbound-dirty,		0x16),
 	NULL,
 };
 
 static struct attribute *mcb_pmu_events_attrs[] = {
-	XGENE_PMU_EVENT_ATTR(cycle-count,			0x00),
-	XGENE_PMU_EVENT_ATTR(cycle-count-div-64,		0x01),
-	XGENE_PMU_EVENT_ATTR(csw-read,				0x02),
-	XGENE_PMU_EVENT_ATTR(csw-write-request,			0x03),
-	XGENE_PMU_EVENT_ATTR(mcb-csw-stall,			0x04),
-	XGENE_PMU_EVENT_ATTR(cancel-read-gack,			0x05),
+	PMU_EVENT_ATTR_ID(cycle-count,			0x00),
+	PMU_EVENT_ATTR_ID(cycle-count-div-64,		0x01),
+	PMU_EVENT_ATTR_ID(csw-read,			0x02),
+	PMU_EVENT_ATTR_ID(csw-write-request,		0x03),
+	PMU_EVENT_ATTR_ID(mcb-csw-stall,		0x04),
+	PMU_EVENT_ATTR_ID(cancel-read-gack,		0x05),
 	NULL,
 };
 
 static struct attribute *mc_pmu_events_attrs[] = {
-	XGENE_PMU_EVENT_ATTR(cycle-count,			0x00),
-	XGENE_PMU_EVENT_ATTR(cycle-count-div-64,		0x01),
-	XGENE_PMU_EVENT_ATTR(act-cmd-sent,			0x02),
-	XGENE_PMU_EVENT_ATTR(pre-cmd-sent,			0x03),
-	XGENE_PMU_EVENT_ATTR(rd-cmd-sent,			0x04),
-	XGENE_PMU_EVENT_ATTR(rda-cmd-sent,			0x05),
-	XGENE_PMU_EVENT_ATTR(wr-cmd-sent,			0x06),
-	XGENE_PMU_EVENT_ATTR(wra-cmd-sent,			0x07),
-	XGENE_PMU_EVENT_ATTR(pde-cmd-sent,			0x08),
-	XGENE_PMU_EVENT_ATTR(sre-cmd-sent,			0x09),
-	XGENE_PMU_EVENT_ATTR(prea-cmd-sent,			0x0a),
-	XGENE_PMU_EVENT_ATTR(ref-cmd-sent,			0x0b),
-	XGENE_PMU_EVENT_ATTR(rd-rda-cmd-sent,			0x0c),
-	XGENE_PMU_EVENT_ATTR(wr-wra-cmd-sent,			0x0d),
-	XGENE_PMU_EVENT_ATTR(in-rd-collision,			0x0e),
-	XGENE_PMU_EVENT_ATTR(in-wr-collision,			0x0f),
-	XGENE_PMU_EVENT_ATTR(collision-queue-not-empty,		0x10),
-	XGENE_PMU_EVENT_ATTR(collision-queue-full,		0x11),
-	XGENE_PMU_EVENT_ATTR(mcu-request,			0x12),
-	XGENE_PMU_EVENT_ATTR(mcu-rd-request,			0x13),
-	XGENE_PMU_EVENT_ATTR(mcu-hp-rd-request,			0x14),
-	XGENE_PMU_EVENT_ATTR(mcu-wr-request,			0x15),
-	XGENE_PMU_EVENT_ATTR(mcu-rd-proceed-all,		0x16),
-	XGENE_PMU_EVENT_ATTR(mcu-rd-proceed-cancel,		0x17),
-	XGENE_PMU_EVENT_ATTR(mcu-rd-response,			0x18),
-	XGENE_PMU_EVENT_ATTR(mcu-rd-proceed-speculative-all,	0x19),
-	XGENE_PMU_EVENT_ATTR(mcu-rd-proceed-speculative-cancel,	0x1a),
-	XGENE_PMU_EVENT_ATTR(mcu-wr-proceed-all,		0x1b),
-	XGENE_PMU_EVENT_ATTR(mcu-wr-proceed-cancel,		0x1c),
+	PMU_EVENT_ATTR_ID(cycle-count,			0x00),
+	PMU_EVENT_ATTR_ID(cycle-count-div-64,		0x01),
+	PMU_EVENT_ATTR_ID(act-cmd-sent,			0x02),
+	PMU_EVENT_ATTR_ID(pre-cmd-sent,			0x03),
+	PMU_EVENT_ATTR_ID(rd-cmd-sent,			0x04),
+	PMU_EVENT_ATTR_ID(rda-cmd-sent,			0x05),
+	PMU_EVENT_ATTR_ID(wr-cmd-sent,			0x06),
+	PMU_EVENT_ATTR_ID(wra-cmd-sent,			0x07),
+	PMU_EVENT_ATTR_ID(pde-cmd-sent,			0x08),
+	PMU_EVENT_ATTR_ID(sre-cmd-sent,			0x09),
+	PMU_EVENT_ATTR_ID(prea-cmd-sent,		0x0a),
+	PMU_EVENT_ATTR_ID(ref-cmd-sent,			0x0b),
+	PMU_EVENT_ATTR_ID(rd-rda-cmd-sent,		0x0c),
+	PMU_EVENT_ATTR_ID(wr-wra-cmd-sent,		0x0d),
+	PMU_EVENT_ATTR_ID(in-rd-collision,		0x0e),
+	PMU_EVENT_ATTR_ID(in-wr-collision,		0x0f),
+	PMU_EVENT_ATTR_ID(collision-queue-not-empty,	0x10),
+	PMU_EVENT_ATTR_ID(collision-queue-full,		0x11),
+	PMU_EVENT_ATTR_ID(mcu-request,			0x12),
+	PMU_EVENT_ATTR_ID(mcu-rd-request,		0x13),
+	PMU_EVENT_ATTR_ID(mcu-hp-rd-request,		0x14),
+	PMU_EVENT_ATTR_ID(mcu-wr-request,		0x15),
+	PMU_EVENT_ATTR_ID(mcu-rd-proceed-all,		0x16),
+	PMU_EVENT_ATTR_ID(mcu-rd-proceed-cancel,	0x17),
+	PMU_EVENT_ATTR_ID(mcu-rd-response,		0x18),
+	PMU_EVENT_ATTR_ID(mcu-rd-proceed-speculative-all,	0x19),
+	PMU_EVENT_ATTR_ID(mcu-rd-proceed-speculative-cancel,	0x1a),
+	PMU_EVENT_ATTR_ID(mcu-wr-proceed-all,		0x1b),
+	PMU_EVENT_ATTR_ID(mcu-wr-proceed-cancel,	0x1c),
 	NULL,
 };
 
@@ -389,190 +374,190 @@ static const struct attribute_group mc_pmu_events_attr_group = {
 };
 
 static struct attribute *l3c_pmu_v3_events_attrs[] = {
-	XGENE_PMU_EVENT_ATTR(cycle-count,			0x00),
-	XGENE_PMU_EVENT_ATTR(read-hit,				0x01),
-	XGENE_PMU_EVENT_ATTR(read-miss,				0x02),
-	XGENE_PMU_EVENT_ATTR(index-flush-eviction,		0x03),
-	XGENE_PMU_EVENT_ATTR(write-caused-replacement,		0x04),
-	XGENE_PMU_EVENT_ATTR(write-not-caused-replacement,	0x05),
-	XGENE_PMU_EVENT_ATTR(clean-eviction,			0x06),
-	XGENE_PMU_EVENT_ATTR(dirty-eviction,			0x07),
-	XGENE_PMU_EVENT_ATTR(read,				0x08),
-	XGENE_PMU_EVENT_ATTR(write,				0x09),
-	XGENE_PMU_EVENT_ATTR(request,				0x0a),
-	XGENE_PMU_EVENT_ATTR(tq-bank-conflict-issue-stall,	0x0b),
-	XGENE_PMU_EVENT_ATTR(tq-full,				0x0c),
-	XGENE_PMU_EVENT_ATTR(ackq-full,				0x0d),
-	XGENE_PMU_EVENT_ATTR(wdb-full,				0x0e),
-	XGENE_PMU_EVENT_ATTR(odb-full,				0x10),
-	XGENE_PMU_EVENT_ATTR(wbq-full,				0x11),
-	XGENE_PMU_EVENT_ATTR(input-req-async-fifo-stall,	0x12),
-	XGENE_PMU_EVENT_ATTR(output-req-async-fifo-stall,	0x13),
-	XGENE_PMU_EVENT_ATTR(output-data-async-fifo-stall,	0x14),
-	XGENE_PMU_EVENT_ATTR(total-insertion,			0x15),
-	XGENE_PMU_EVENT_ATTR(sip-insertions-r-set,		0x16),
-	XGENE_PMU_EVENT_ATTR(sip-insertions-r-clear,		0x17),
-	XGENE_PMU_EVENT_ATTR(dip-insertions-r-set,		0x18),
-	XGENE_PMU_EVENT_ATTR(dip-insertions-r-clear,		0x19),
-	XGENE_PMU_EVENT_ATTR(dip-insertions-force-r-set,	0x1a),
-	XGENE_PMU_EVENT_ATTR(egression,				0x1b),
-	XGENE_PMU_EVENT_ATTR(replacement,			0x1c),
-	XGENE_PMU_EVENT_ATTR(old-replacement,			0x1d),
-	XGENE_PMU_EVENT_ATTR(young-replacement,			0x1e),
-	XGENE_PMU_EVENT_ATTR(r-set-replacement,			0x1f),
-	XGENE_PMU_EVENT_ATTR(r-clear-replacement,		0x20),
-	XGENE_PMU_EVENT_ATTR(old-r-replacement,			0x21),
-	XGENE_PMU_EVENT_ATTR(old-nr-replacement,		0x22),
-	XGENE_PMU_EVENT_ATTR(young-r-replacement,		0x23),
-	XGENE_PMU_EVENT_ATTR(young-nr-replacement,		0x24),
-	XGENE_PMU_EVENT_ATTR(bloomfilter-clearing,		0x25),
-	XGENE_PMU_EVENT_ATTR(generation-flip,			0x26),
-	XGENE_PMU_EVENT_ATTR(vcc-droop-detected,		0x27),
+	PMU_EVENT_ATTR_ID(cycle-count,			0x00),
+	PMU_EVENT_ATTR_ID(read-hit,			0x01),
+	PMU_EVENT_ATTR_ID(read-miss,			0x02),
+	PMU_EVENT_ATTR_ID(index-flush-eviction,		0x03),
+	PMU_EVENT_ATTR_ID(write-caused-replacement,	0x04),
+	PMU_EVENT_ATTR_ID(write-not-caused-replacement,	0x05),
+	PMU_EVENT_ATTR_ID(clean-eviction,		0x06),
+	PMU_EVENT_ATTR_ID(dirty-eviction,		0x07),
+	PMU_EVENT_ATTR_ID(read,				0x08),
+	PMU_EVENT_ATTR_ID(write,			0x09),
+	PMU_EVENT_ATTR_ID(request,			0x0a),
+	PMU_EVENT_ATTR_ID(tq-bank-conflict-issue-stall,	0x0b),
+	PMU_EVENT_ATTR_ID(tq-full,			0x0c),
+	PMU_EVENT_ATTR_ID(ackq-full,			0x0d),
+	PMU_EVENT_ATTR_ID(wdb-full,			0x0e),
+	PMU_EVENT_ATTR_ID(odb-full,			0x10),
+	PMU_EVENT_ATTR_ID(wbq-full,			0x11),
+	PMU_EVENT_ATTR_ID(input-req-async-fifo-stall,	0x12),
+	PMU_EVENT_ATTR_ID(output-req-async-fifo-stall,	0x13),
+	PMU_EVENT_ATTR_ID(output-data-async-fifo-stall,	0x14),
+	PMU_EVENT_ATTR_ID(total-insertion,		0x15),
+	PMU_EVENT_ATTR_ID(sip-insertions-r-set,		0x16),
+	PMU_EVENT_ATTR_ID(sip-insertions-r-clear,	0x17),
+	PMU_EVENT_ATTR_ID(dip-insertions-r-set,		0x18),
+	PMU_EVENT_ATTR_ID(dip-insertions-r-clear,	0x19),
+	PMU_EVENT_ATTR_ID(dip-insertions-force-r-set,	0x1a),
+	PMU_EVENT_ATTR_ID(egression,			0x1b),
+	PMU_EVENT_ATTR_ID(replacement,			0x1c),
+	PMU_EVENT_ATTR_ID(old-replacement,		0x1d),
+	PMU_EVENT_ATTR_ID(young-replacement,		0x1e),
+	PMU_EVENT_ATTR_ID(r-set-replacement,		0x1f),
+	PMU_EVENT_ATTR_ID(r-clear-replacement,		0x20),
+	PMU_EVENT_ATTR_ID(old-r-replacement,		0x21),
+	PMU_EVENT_ATTR_ID(old-nr-replacement,		0x22),
+	PMU_EVENT_ATTR_ID(young-r-replacement,		0x23),
+	PMU_EVENT_ATTR_ID(young-nr-replacement,		0x24),
+	PMU_EVENT_ATTR_ID(bloomfilter-clearing,		0x25),
+	PMU_EVENT_ATTR_ID(generation-flip,		0x26),
+	PMU_EVENT_ATTR_ID(vcc-droop-detected,		0x27),
 	NULL,
 };
 
 static struct attribute *iob_fast_pmu_v3_events_attrs[] = {
-	XGENE_PMU_EVENT_ATTR(cycle-count,			0x00),
-	XGENE_PMU_EVENT_ATTR(pa-req-buf-alloc-all,		0x01),
-	XGENE_PMU_EVENT_ATTR(pa-req-buf-alloc-rd,		0x02),
-	XGENE_PMU_EVENT_ATTR(pa-req-buf-alloc-wr,		0x03),
-	XGENE_PMU_EVENT_ATTR(pa-all-cp-req,			0x04),
-	XGENE_PMU_EVENT_ATTR(pa-cp-blk-req,			0x05),
-	XGENE_PMU_EVENT_ATTR(pa-cp-ptl-req,			0x06),
-	XGENE_PMU_EVENT_ATTR(pa-cp-rd-req,			0x07),
-	XGENE_PMU_EVENT_ATTR(pa-cp-wr-req,			0x08),
-	XGENE_PMU_EVENT_ATTR(ba-all-req,			0x09),
-	XGENE_PMU_EVENT_ATTR(ba-rd-req,				0x0a),
-	XGENE_PMU_EVENT_ATTR(ba-wr-req,				0x0b),
-	XGENE_PMU_EVENT_ATTR(pa-rd-shared-req-issued,		0x10),
-	XGENE_PMU_EVENT_ATTR(pa-rd-exclusive-req-issued,	0x11),
-	XGENE_PMU_EVENT_ATTR(pa-wr-invalidate-req-issued-stashable, 0x12),
-	XGENE_PMU_EVENT_ATTR(pa-wr-invalidate-req-issued-nonstashable, 0x13),
-	XGENE_PMU_EVENT_ATTR(pa-wr-back-req-issued-stashable,	0x14),
-	XGENE_PMU_EVENT_ATTR(pa-wr-back-req-issued-nonstashable, 0x15),
-	XGENE_PMU_EVENT_ATTR(pa-ptl-wr-req,			0x16),
-	XGENE_PMU_EVENT_ATTR(pa-ptl-rd-req,			0x17),
-	XGENE_PMU_EVENT_ATTR(pa-wr-back-clean-data,		0x18),
-	XGENE_PMU_EVENT_ATTR(pa-wr-back-cancelled-on-SS,	0x1b),
-	XGENE_PMU_EVENT_ATTR(pa-barrier-occurrence,		0x1c),
-	XGENE_PMU_EVENT_ATTR(pa-barrier-cycles,			0x1d),
-	XGENE_PMU_EVENT_ATTR(pa-total-cp-snoops,		0x20),
-	XGENE_PMU_EVENT_ATTR(pa-rd-shared-snoop,		0x21),
-	XGENE_PMU_EVENT_ATTR(pa-rd-shared-snoop-hit,		0x22),
-	XGENE_PMU_EVENT_ATTR(pa-rd-exclusive-snoop,		0x23),
-	XGENE_PMU_EVENT_ATTR(pa-rd-exclusive-snoop-hit,		0x24),
-	XGENE_PMU_EVENT_ATTR(pa-rd-wr-invalid-snoop,		0x25),
-	XGENE_PMU_EVENT_ATTR(pa-rd-wr-invalid-snoop-hit,	0x26),
-	XGENE_PMU_EVENT_ATTR(pa-req-buffer-full,		0x28),
-	XGENE_PMU_EVENT_ATTR(cswlf-outbound-req-fifo-full,	0x29),
-	XGENE_PMU_EVENT_ATTR(cswlf-inbound-snoop-fifo-backpressure, 0x2a),
-	XGENE_PMU_EVENT_ATTR(cswlf-outbound-lack-fifo-full,	0x2b),
-	XGENE_PMU_EVENT_ATTR(cswlf-inbound-gack-fifo-backpressure, 0x2c),
-	XGENE_PMU_EVENT_ATTR(cswlf-outbound-data-fifo-full,	0x2d),
-	XGENE_PMU_EVENT_ATTR(cswlf-inbound-data-fifo-backpressure, 0x2e),
-	XGENE_PMU_EVENT_ATTR(cswlf-inbound-req-backpressure,	0x2f),
+	PMU_EVENT_ATTR_ID(cycle-count,			0x00),
+	PMU_EVENT_ATTR_ID(pa-req-buf-alloc-all,		0x01),
+	PMU_EVENT_ATTR_ID(pa-req-buf-alloc-rd,		0x02),
+	PMU_EVENT_ATTR_ID(pa-req-buf-alloc-wr,		0x03),
+	PMU_EVENT_ATTR_ID(pa-all-cp-req,		0x04),
+	PMU_EVENT_ATTR_ID(pa-cp-blk-req,		0x05),
+	PMU_EVENT_ATTR_ID(pa-cp-ptl-req,		0x06),
+	PMU_EVENT_ATTR_ID(pa-cp-rd-req,			0x07),
+	PMU_EVENT_ATTR_ID(pa-cp-wr-req,			0x08),
+	PMU_EVENT_ATTR_ID(ba-all-req,			0x09),
+	PMU_EVENT_ATTR_ID(ba-rd-req,			0x0a),
+	PMU_EVENT_ATTR_ID(ba-wr-req,			0x0b),
+	PMU_EVENT_ATTR_ID(pa-rd-shared-req-issued,	0x10),
+	PMU_EVENT_ATTR_ID(pa-rd-exclusive-req-issued,	0x11),
+	PMU_EVENT_ATTR_ID(pa-wr-invalidate-req-issued-stashable, 0x12),
+	PMU_EVENT_ATTR_ID(pa-wr-invalidate-req-issued-nonstashable, 0x13),
+	PMU_EVENT_ATTR_ID(pa-wr-back-req-issued-stashable,	0x14),
+	PMU_EVENT_ATTR_ID(pa-wr-back-req-issued-nonstashable, 0x15),
+	PMU_EVENT_ATTR_ID(pa-ptl-wr-req,		0x16),
+	PMU_EVENT_ATTR_ID(pa-ptl-rd-req,		0x17),
+	PMU_EVENT_ATTR_ID(pa-wr-back-clean-data,	0x18),
+	PMU_EVENT_ATTR_ID(pa-wr-back-cancelled-on-SS,	0x1b),
+	PMU_EVENT_ATTR_ID(pa-barrier-occurrence,	0x1c),
+	PMU_EVENT_ATTR_ID(pa-barrier-cycles,		0x1d),
+	PMU_EVENT_ATTR_ID(pa-total-cp-snoops,		0x20),
+	PMU_EVENT_ATTR_ID(pa-rd-shared-snoop,		0x21),
+	PMU_EVENT_ATTR_ID(pa-rd-shared-snoop-hit,	0x22),
+	PMU_EVENT_ATTR_ID(pa-rd-exclusive-snoop,	0x23),
+	PMU_EVENT_ATTR_ID(pa-rd-exclusive-snoop-hit,	0x24),
+	PMU_EVENT_ATTR_ID(pa-rd-wr-invalid-snoop,	0x25),
+	PMU_EVENT_ATTR_ID(pa-rd-wr-invalid-snoop-hit,	0x26),
+	PMU_EVENT_ATTR_ID(pa-req-buffer-full,		0x28),
+	PMU_EVENT_ATTR_ID(cswlf-outbound-req-fifo-full,	0x29),
+	PMU_EVENT_ATTR_ID(cswlf-inbound-snoop-fifo-backpressure, 0x2a),
+	PMU_EVENT_ATTR_ID(cswlf-outbound-lack-fifo-full,	0x2b),
+	PMU_EVENT_ATTR_ID(cswlf-inbound-gack-fifo-backpressure, 0x2c),
+	PMU_EVENT_ATTR_ID(cswlf-outbound-data-fifo-full,	0x2d),
+	PMU_EVENT_ATTR_ID(cswlf-inbound-data-fifo-backpressure, 0x2e),
+	PMU_EVENT_ATTR_ID(cswlf-inbound-req-backpressure,	0x2f),
 	NULL,
 };
 
 static struct attribute *iob_slow_pmu_v3_events_attrs[] = {
-	XGENE_PMU_EVENT_ATTR(cycle-count,			0x00),
-	XGENE_PMU_EVENT_ATTR(pa-axi0-rd-req,			0x01),
-	XGENE_PMU_EVENT_ATTR(pa-axi0-wr-req,			0x02),
-	XGENE_PMU_EVENT_ATTR(pa-axi1-rd-req,			0x03),
-	XGENE_PMU_EVENT_ATTR(pa-axi1-wr-req,			0x04),
-	XGENE_PMU_EVENT_ATTR(ba-all-axi-req,			0x07),
-	XGENE_PMU_EVENT_ATTR(ba-axi-rd-req,			0x08),
-	XGENE_PMU_EVENT_ATTR(ba-axi-wr-req,			0x09),
-	XGENE_PMU_EVENT_ATTR(ba-free-list-empty,		0x10),
+	PMU_EVENT_ATTR_ID(cycle-count,			0x00),
+	PMU_EVENT_ATTR_ID(pa-axi0-rd-req,		0x01),
+	PMU_EVENT_ATTR_ID(pa-axi0-wr-req,		0x02),
+	PMU_EVENT_ATTR_ID(pa-axi1-rd-req,		0x03),
+	PMU_EVENT_ATTR_ID(pa-axi1-wr-req,		0x04),
+	PMU_EVENT_ATTR_ID(ba-all-axi-req,		0x07),
+	PMU_EVENT_ATTR_ID(ba-axi-rd-req,		0x08),
+	PMU_EVENT_ATTR_ID(ba-axi-wr-req,		0x09),
+	PMU_EVENT_ATTR_ID(ba-free-list-empty,		0x10),
 	NULL,
 };
 
 static struct attribute *mcb_pmu_v3_events_attrs[] = {
-	XGENE_PMU_EVENT_ATTR(cycle-count,			0x00),
-	XGENE_PMU_EVENT_ATTR(req-receive,			0x01),
-	XGENE_PMU_EVENT_ATTR(rd-req-recv,			0x02),
-	XGENE_PMU_EVENT_ATTR(rd-req-recv-2,			0x03),
-	XGENE_PMU_EVENT_ATTR(wr-req-recv,			0x04),
-	XGENE_PMU_EVENT_ATTR(wr-req-recv-2,			0x05),
-	XGENE_PMU_EVENT_ATTR(rd-req-sent-to-mcu,		0x06),
-	XGENE_PMU_EVENT_ATTR(rd-req-sent-to-mcu-2,		0x07),
-	XGENE_PMU_EVENT_ATTR(rd-req-sent-to-spec-mcu,		0x08),
-	XGENE_PMU_EVENT_ATTR(rd-req-sent-to-spec-mcu-2,		0x09),
-	XGENE_PMU_EVENT_ATTR(glbl-ack-recv-for-rd-sent-to-spec-mcu, 0x0a),
-	XGENE_PMU_EVENT_ATTR(glbl-ack-go-recv-for-rd-sent-to-spec-mcu, 0x0b),
-	XGENE_PMU_EVENT_ATTR(glbl-ack-nogo-recv-for-rd-sent-to-spec-mcu, 0x0c),
-	XGENE_PMU_EVENT_ATTR(glbl-ack-go-recv-any-rd-req,	0x0d),
-	XGENE_PMU_EVENT_ATTR(glbl-ack-go-recv-any-rd-req-2,	0x0e),
-	XGENE_PMU_EVENT_ATTR(wr-req-sent-to-mcu,		0x0f),
-	XGENE_PMU_EVENT_ATTR(gack-recv,				0x10),
-	XGENE_PMU_EVENT_ATTR(rd-gack-recv,			0x11),
-	XGENE_PMU_EVENT_ATTR(wr-gack-recv,			0x12),
-	XGENE_PMU_EVENT_ATTR(cancel-rd-gack,			0x13),
-	XGENE_PMU_EVENT_ATTR(cancel-wr-gack,			0x14),
-	XGENE_PMU_EVENT_ATTR(mcb-csw-req-stall,			0x15),
-	XGENE_PMU_EVENT_ATTR(mcu-req-intf-blocked,		0x16),
-	XGENE_PMU_EVENT_ATTR(mcb-mcu-rd-intf-stall,		0x17),
-	XGENE_PMU_EVENT_ATTR(csw-rd-intf-blocked,		0x18),
-	XGENE_PMU_EVENT_ATTR(csw-local-ack-intf-blocked,	0x19),
-	XGENE_PMU_EVENT_ATTR(mcu-req-table-full,		0x1a),
-	XGENE_PMU_EVENT_ATTR(mcu-stat-table-full,		0x1b),
-	XGENE_PMU_EVENT_ATTR(mcu-wr-table-full,			0x1c),
-	XGENE_PMU_EVENT_ATTR(mcu-rdreceipt-resp,		0x1d),
-	XGENE_PMU_EVENT_ATTR(mcu-wrcomplete-resp,		0x1e),
-	XGENE_PMU_EVENT_ATTR(mcu-retryack-resp,			0x1f),
-	XGENE_PMU_EVENT_ATTR(mcu-pcrdgrant-resp,		0x20),
-	XGENE_PMU_EVENT_ATTR(mcu-req-from-lastload,		0x21),
-	XGENE_PMU_EVENT_ATTR(mcu-req-from-bypass,		0x22),
-	XGENE_PMU_EVENT_ATTR(volt-droop-detect,			0x23),
+	PMU_EVENT_ATTR_ID(cycle-count,			0x00),
+	PMU_EVENT_ATTR_ID(req-receive,			0x01),
+	PMU_EVENT_ATTR_ID(rd-req-recv,			0x02),
+	PMU_EVENT_ATTR_ID(rd-req-recv-2,		0x03),
+	PMU_EVENT_ATTR_ID(wr-req-recv,			0x04),
+	PMU_EVENT_ATTR_ID(wr-req-recv-2,		0x05),
+	PMU_EVENT_ATTR_ID(rd-req-sent-to-mcu,		0x06),
+	PMU_EVENT_ATTR_ID(rd-req-sent-to-mcu-2,		0x07),
+	PMU_EVENT_ATTR_ID(rd-req-sent-to-spec-mcu,	0x08),
+	PMU_EVENT_ATTR_ID(rd-req-sent-to-spec-mcu-2,	0x09),
+	PMU_EVENT_ATTR_ID(glbl-ack-recv-for-rd-sent-to-spec-mcu, 0x0a),
+	PMU_EVENT_ATTR_ID(glbl-ack-go-recv-for-rd-sent-to-spec-mcu, 0x0b),
+	PMU_EVENT_ATTR_ID(glbl-ack-nogo-recv-for-rd-sent-to-spec-mcu, 0x0c),
+	PMU_EVENT_ATTR_ID(glbl-ack-go-recv-any-rd-req,	0x0d),
+	PMU_EVENT_ATTR_ID(glbl-ack-go-recv-any-rd-req-2,	0x0e),
+	PMU_EVENT_ATTR_ID(wr-req-sent-to-mcu,		0x0f),
+	PMU_EVENT_ATTR_ID(gack-recv,			0x10),
+	PMU_EVENT_ATTR_ID(rd-gack-recv,			0x11),
+	PMU_EVENT_ATTR_ID(wr-gack-recv,			0x12),
+	PMU_EVENT_ATTR_ID(cancel-rd-gack,		0x13),
+	PMU_EVENT_ATTR_ID(cancel-wr-gack,		0x14),
+	PMU_EVENT_ATTR_ID(mcb-csw-req-stall,		0x15),
+	PMU_EVENT_ATTR_ID(mcu-req-intf-blocked,		0x16),
+	PMU_EVENT_ATTR_ID(mcb-mcu-rd-intf-stall,	0x17),
+	PMU_EVENT_ATTR_ID(csw-rd-intf-blocked,		0x18),
+	PMU_EVENT_ATTR_ID(csw-local-ack-intf-blocked,	0x19),
+	PMU_EVENT_ATTR_ID(mcu-req-table-full,		0x1a),
+	PMU_EVENT_ATTR_ID(mcu-stat-table-full,		0x1b),
+	PMU_EVENT_ATTR_ID(mcu-wr-table-full,		0x1c),
+	PMU_EVENT_ATTR_ID(mcu-rdreceipt-resp,		0x1d),
+	PMU_EVENT_ATTR_ID(mcu-wrcomplete-resp,		0x1e),
+	PMU_EVENT_ATTR_ID(mcu-retryack-resp,		0x1f),
+	PMU_EVENT_ATTR_ID(mcu-pcrdgrant-resp,		0x20),
+	PMU_EVENT_ATTR_ID(mcu-req-from-lastload,	0x21),
+	PMU_EVENT_ATTR_ID(mcu-req-from-bypass,		0x22),
+	PMU_EVENT_ATTR_ID(volt-droop-detect,		0x23),
 	NULL,
 };
 
 static struct attribute *mc_pmu_v3_events_attrs[] = {
-	XGENE_PMU_EVENT_ATTR(cycle-count,			0x00),
-	XGENE_PMU_EVENT_ATTR(act-sent,				0x01),
-	XGENE_PMU_EVENT_ATTR(pre-sent,				0x02),
-	XGENE_PMU_EVENT_ATTR(rd-sent,				0x03),
-	XGENE_PMU_EVENT_ATTR(rda-sent,				0x04),
-	XGENE_PMU_EVENT_ATTR(wr-sent,				0x05),
-	XGENE_PMU_EVENT_ATTR(wra-sent,				0x06),
-	XGENE_PMU_EVENT_ATTR(pd-entry-vld,			0x07),
-	XGENE_PMU_EVENT_ATTR(sref-entry-vld,			0x08),
-	XGENE_PMU_EVENT_ATTR(prea-sent,				0x09),
-	XGENE_PMU_EVENT_ATTR(ref-sent,				0x0a),
-	XGENE_PMU_EVENT_ATTR(rd-rda-sent,			0x0b),
-	XGENE_PMU_EVENT_ATTR(wr-wra-sent,			0x0c),
-	XGENE_PMU_EVENT_ATTR(raw-hazard,			0x0d),
-	XGENE_PMU_EVENT_ATTR(war-hazard,			0x0e),
-	XGENE_PMU_EVENT_ATTR(waw-hazard,			0x0f),
-	XGENE_PMU_EVENT_ATTR(rar-hazard,			0x10),
-	XGENE_PMU_EVENT_ATTR(raw-war-waw-hazard,		0x11),
-	XGENE_PMU_EVENT_ATTR(hprd-lprd-wr-req-vld,		0x12),
-	XGENE_PMU_EVENT_ATTR(lprd-req-vld,			0x13),
-	XGENE_PMU_EVENT_ATTR(hprd-req-vld,			0x14),
-	XGENE_PMU_EVENT_ATTR(hprd-lprd-req-vld,			0x15),
-	XGENE_PMU_EVENT_ATTR(wr-req-vld,			0x16),
-	XGENE_PMU_EVENT_ATTR(partial-wr-req-vld,		0x17),
-	XGENE_PMU_EVENT_ATTR(rd-retry,				0x18),
-	XGENE_PMU_EVENT_ATTR(wr-retry,				0x19),
-	XGENE_PMU_EVENT_ATTR(retry-gnt,				0x1a),
-	XGENE_PMU_EVENT_ATTR(rank-change,			0x1b),
-	XGENE_PMU_EVENT_ATTR(dir-change,			0x1c),
-	XGENE_PMU_EVENT_ATTR(rank-dir-change,			0x1d),
-	XGENE_PMU_EVENT_ATTR(rank-active,			0x1e),
-	XGENE_PMU_EVENT_ATTR(rank-idle,				0x1f),
-	XGENE_PMU_EVENT_ATTR(rank-pd,				0x20),
-	XGENE_PMU_EVENT_ATTR(rank-sref,				0x21),
-	XGENE_PMU_EVENT_ATTR(queue-fill-gt-thresh,		0x22),
-	XGENE_PMU_EVENT_ATTR(queue-rds-gt-thresh,		0x23),
-	XGENE_PMU_EVENT_ATTR(queue-wrs-gt-thresh,		0x24),
-	XGENE_PMU_EVENT_ATTR(phy-updt-complt,			0x25),
-	XGENE_PMU_EVENT_ATTR(tz-fail,				0x26),
-	XGENE_PMU_EVENT_ATTR(dram-errc,				0x27),
-	XGENE_PMU_EVENT_ATTR(dram-errd,				0x28),
-	XGENE_PMU_EVENT_ATTR(rd-enq,				0x29),
-	XGENE_PMU_EVENT_ATTR(wr-enq,				0x2a),
-	XGENE_PMU_EVENT_ATTR(tmac-limit-reached,		0x2b),
-	XGENE_PMU_EVENT_ATTR(tmaw-tracker-full,			0x2c),
+	PMU_EVENT_ATTR_ID(cycle-count,			0x00),
+	PMU_EVENT_ATTR_ID(act-sent,			0x01),
+	PMU_EVENT_ATTR_ID(pre-sent,			0x02),
+	PMU_EVENT_ATTR_ID(rd-sent,			0x03),
+	PMU_EVENT_ATTR_ID(rda-sent,			0x04),
+	PMU_EVENT_ATTR_ID(wr-sent,			0x05),
+	PMU_EVENT_ATTR_ID(wra-sent,			0x06),
+	PMU_EVENT_ATTR_ID(pd-entry-vld,			0x07),
+	PMU_EVENT_ATTR_ID(sref-entry-vld,		0x08),
+	PMU_EVENT_ATTR_ID(prea-sent,			0x09),
+	PMU_EVENT_ATTR_ID(ref-sent,			0x0a),
+	PMU_EVENT_ATTR_ID(rd-rda-sent,			0x0b),
+	PMU_EVENT_ATTR_ID(wr-wra-sent,			0x0c),
+	PMU_EVENT_ATTR_ID(raw-hazard,			0x0d),
+	PMU_EVENT_ATTR_ID(war-hazard,			0x0e),
+	PMU_EVENT_ATTR_ID(waw-hazard,			0x0f),
+	PMU_EVENT_ATTR_ID(rar-hazard,			0x10),
+	PMU_EVENT_ATTR_ID(raw-war-waw-hazard,		0x11),
+	PMU_EVENT_ATTR_ID(hprd-lprd-wr-req-vld,		0x12),
+	PMU_EVENT_ATTR_ID(lprd-req-vld,			0x13),
+	PMU_EVENT_ATTR_ID(hprd-req-vld,			0x14),
+	PMU_EVENT_ATTR_ID(hprd-lprd-req-vld,		0x15),
+	PMU_EVENT_ATTR_ID(wr-req-vld,			0x16),
+	PMU_EVENT_ATTR_ID(partial-wr-req-vld,		0x17),
+	PMU_EVENT_ATTR_ID(rd-retry,			0x18),
+	PMU_EVENT_ATTR_ID(wr-retry,			0x19),
+	PMU_EVENT_ATTR_ID(retry-gnt,			0x1a),
+	PMU_EVENT_ATTR_ID(rank-change,			0x1b),
+	PMU_EVENT_ATTR_ID(dir-change,			0x1c),
+	PMU_EVENT_ATTR_ID(rank-dir-change,		0x1d),
+	PMU_EVENT_ATTR_ID(rank-active,			0x1e),
+	PMU_EVENT_ATTR_ID(rank-idle,			0x1f),
+	PMU_EVENT_ATTR_ID(rank-pd,			0x20),
+	PMU_EVENT_ATTR_ID(rank-sref,			0x21),
+	PMU_EVENT_ATTR_ID(queue-fill-gt-thresh,		0x22),
+	PMU_EVENT_ATTR_ID(queue-rds-gt-thresh,		0x23),
+	PMU_EVENT_ATTR_ID(queue-wrs-gt-thresh,		0x24),
+	PMU_EVENT_ATTR_ID(phy-updt-complt,		0x25),
+	PMU_EVENT_ATTR_ID(tz-fail,			0x26),
+	PMU_EVENT_ATTR_ID(dram-errc,			0x27),
+	PMU_EVENT_ATTR_ID(dram-errd,			0x28),
+	PMU_EVENT_ATTR_ID(rd-enq,			0x29),
+	PMU_EVENT_ATTR_ID(wr-enq,			0x2a),
+	PMU_EVENT_ATTR_ID(tmac-limit-reached,		0x2b),
+	PMU_EVENT_ATTR_ID(tmaw-tracker-full,		0x2c),
 	NULL,
 };
 
-- 
2.7.4


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[PATCH v2 7/9] drivers/perf: Remove redundant macro and functions in fsl_imx8_ddr_perf.c

[Qi Liu]

Remove IMX8_DDR_PMU_EVENT_ATTR and ddr_pmu_event_show(), as there is
a general function for this.

Cc: Frank Li <Frank.li@nxp.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
---
 drivers/perf/fsl_imx8_ddr_perf.c | 80 ++++++++++++++++------------------------
 1 file changed, 32 insertions(+), 48 deletions(-)

diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_perf.c
index 2bbb931..8f2c4dd 100644
--- a/drivers/perf/fsl_imx8_ddr_perf.c
+++ b/drivers/perf/fsl_imx8_ddr_perf.c
@@ -212,55 +212,39 @@ static const struct attribute_group ddr_perf_cpumask_attr_group = {
 	.attrs = ddr_perf_cpumask_attrs,
 };
 
-static ssize_t
-ddr_pmu_event_show(struct device *dev, struct device_attribute *attr,
-		   char *page)
-{
-	struct perf_pmu_events_attr *pmu_attr;
-
-	pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr);
-	return sysfs_emit(page, "event=0x%02llx\n", pmu_attr->id);
-}
-
-#define IMX8_DDR_PMU_EVENT_ATTR(_name, _id)				\
-	(&((struct perf_pmu_events_attr[]) {				\
-		{ .attr = __ATTR(_name, 0444, ddr_pmu_event_show, NULL),\
-		  .id = _id, }						\
-	})[0].attr.attr)
-
 static struct attribute *ddr_perf_events_attrs[] = {
-	IMX8_DDR_PMU_EVENT_ATTR(cycles, EVENT_CYCLES_ID),
-	IMX8_DDR_PMU_EVENT_ATTR(selfresh, 0x01),
-	IMX8_DDR_PMU_EVENT_ATTR(read-accesses, 0x04),
-	IMX8_DDR_PMU_EVENT_ATTR(write-accesses, 0x05),
-	IMX8_DDR_PMU_EVENT_ATTR(read-queue-depth, 0x08),
-	IMX8_DDR_PMU_EVENT_ATTR(write-queue-depth, 0x09),
-	IMX8_DDR_PMU_EVENT_ATTR(lp-read-credit-cnt, 0x10),
-	IMX8_DDR_PMU_EVENT_ATTR(hp-read-credit-cnt, 0x11),
-	IMX8_DDR_PMU_EVENT_ATTR(write-credit-cnt, 0x12),
-	IMX8_DDR_PMU_EVENT_ATTR(read-command, 0x20),
-	IMX8_DDR_PMU_EVENT_ATTR(write-command, 0x21),
-	IMX8_DDR_PMU_EVENT_ATTR(read-modify-write-command, 0x22),
-	IMX8_DDR_PMU_EVENT_ATTR(hp-read, 0x23),
-	IMX8_DDR_PMU_EVENT_ATTR(hp-req-nocredit, 0x24),
-	IMX8_DDR_PMU_EVENT_ATTR(hp-xact-credit, 0x25),
-	IMX8_DDR_PMU_EVENT_ATTR(lp-req-nocredit, 0x26),
-	IMX8_DDR_PMU_EVENT_ATTR(lp-xact-credit, 0x27),
-	IMX8_DDR_PMU_EVENT_ATTR(wr-xact-credit, 0x29),
-	IMX8_DDR_PMU_EVENT_ATTR(read-cycles, 0x2a),
-	IMX8_DDR_PMU_EVENT_ATTR(write-cycles, 0x2b),
-	IMX8_DDR_PMU_EVENT_ATTR(read-write-transition, 0x30),
-	IMX8_DDR_PMU_EVENT_ATTR(precharge, 0x31),
-	IMX8_DDR_PMU_EVENT_ATTR(activate, 0x32),
-	IMX8_DDR_PMU_EVENT_ATTR(load-mode, 0x33),
-	IMX8_DDR_PMU_EVENT_ATTR(perf-mwr, 0x34),
-	IMX8_DDR_PMU_EVENT_ATTR(read, 0x35),
-	IMX8_DDR_PMU_EVENT_ATTR(read-activate, 0x36),
-	IMX8_DDR_PMU_EVENT_ATTR(refresh, 0x37),
-	IMX8_DDR_PMU_EVENT_ATTR(write, 0x38),
-	IMX8_DDR_PMU_EVENT_ATTR(raw-hazard, 0x39),
-	IMX8_DDR_PMU_EVENT_ATTR(axid-read, 0x41),
-	IMX8_DDR_PMU_EVENT_ATTR(axid-write, 0x42),
+	PMU_EVENT_ATTR_ID(cycles, EVENT_CYCLES_ID),
+	PMU_EVENT_ATTR_ID(selfresh, 0x01),
+	PMU_EVENT_ATTR_ID(read-accesses, 0x04),
+	PMU_EVENT_ATTR_ID(write-accesses, 0x05),
+	PMU_EVENT_ATTR_ID(read-queue-depth, 0x08),
+	PMU_EVENT_ATTR_ID(write-queue-depth, 0x09),
+	PMU_EVENT_ATTR_ID(lp-read-credit-cnt, 0x10),
+	PMU_EVENT_ATTR_ID(hp-read-credit-cnt, 0x11),
+	PMU_EVENT_ATTR_ID(write-credit-cnt, 0x12),
+	PMU_EVENT_ATTR_ID(read-command, 0x20),
+	PMU_EVENT_ATTR_ID(write-command, 0x21),
+	PMU_EVENT_ATTR_ID(read-modify-write-command, 0x22),
+	PMU_EVENT_ATTR_ID(hp-read, 0x23),
+	PMU_EVENT_ATTR_ID(hp-req-nocredit, 0x24),
+	PMU_EVENT_ATTR_ID(hp-xact-credit, 0x25),
+	PMU_EVENT_ATTR_ID(lp-req-nocredit, 0x26),
+	PMU_EVENT_ATTR_ID(lp-xact-credit, 0x27),
+	PMU_EVENT_ATTR_ID(wr-xact-credit, 0x29),
+	PMU_EVENT_ATTR_ID(read-cycles, 0x2a),
+	PMU_EVENT_ATTR_ID(write-cycles, 0x2b),
+	PMU_EVENT_ATTR_ID(read-write-transition, 0x30),
+	PMU_EVENT_ATTR_ID(precharge, 0x31),
+	PMU_EVENT_ATTR_ID(activate, 0x32),
+	PMU_EVENT_ATTR_ID(load-mode, 0x33),
+	PMU_EVENT_ATTR_ID(perf-mwr, 0x34),
+	PMU_EVENT_ATTR_ID(read, 0x35),
+	PMU_EVENT_ATTR_ID(read-activate, 0x36),
+	PMU_EVENT_ATTR_ID(refresh, 0x37),
+	PMU_EVENT_ATTR_ID(write, 0x38),
+	PMU_EVENT_ATTR_ID(raw-hazard, 0x39),
+	PMU_EVENT_ATTR_ID(axid-read, 0x41),
+	PMU_EVENT_ATTR_ID(axid-write, 0x42),
 	NULL,
 };
 
-- 
2.7.4


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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH v2 8/9] drivers/perf: Remove redundant macro and functions in arm_dsu_pmu.c

[Qi Liu]

Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Remove DSU_EVENT_ATTR and dsu_pmu_sysfs_event_show(), as there is
a general function for this.

Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
---
 drivers/perf/arm_dsu_pmu.c | 28 ++++++++--------------------
 1 file changed, 8 insertions(+), 20 deletions(-)

diff --git a/drivers/perf/arm_dsu_pmu.c b/drivers/perf/arm_dsu_pmu.c
index 196faea..33bb97e 100644
--- a/drivers/perf/arm_dsu_pmu.c
+++ b/drivers/perf/arm_dsu_pmu.c
@@ -81,9 +81,6 @@
 		}							\
 	})[0].attr.attr)
 
-#define DSU_EVENT_ATTR(_name, _config)		\
-	DSU_EXT_ATTR(_name, dsu_pmu_sysfs_event_show, (unsigned long)_config)
-
 #define DSU_FORMAT_ATTR(_name, _config)		\
 	DSU_EXT_ATTR(_name, dsu_pmu_sysfs_format_show, (char *)_config)
 
@@ -130,15 +127,6 @@ static inline struct dsu_pmu *to_dsu_pmu(struct pmu *pmu)
 	return container_of(pmu, struct dsu_pmu, pmu);
 }
 
-static ssize_t dsu_pmu_sysfs_event_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct dev_ext_attribute *eattr = container_of(attr,
-					struct dev_ext_attribute, attr);
-	return sysfs_emit(buf, "event=0x%lx\n", (unsigned long)eattr->var);
-}
-
 static ssize_t dsu_pmu_sysfs_format_show(struct device *dev,
 					 struct device_attribute *attr,
 					 char *buf)
@@ -183,14 +171,14 @@ static const struct attribute_group dsu_pmu_format_attr_group = {
 };
 
 static struct attribute *dsu_pmu_event_attrs[] = {
-	DSU_EVENT_ATTR(cycles, 0x11),
-	DSU_EVENT_ATTR(bus_access, 0x19),
-	DSU_EVENT_ATTR(memory_error, 0x1a),
-	DSU_EVENT_ATTR(bus_cycles, 0x1d),
-	DSU_EVENT_ATTR(l3d_cache_allocate, 0x29),
-	DSU_EVENT_ATTR(l3d_cache_refill, 0x2a),
-	DSU_EVENT_ATTR(l3d_cache, 0x2b),
-	DSU_EVENT_ATTR(l3d_cache_wb, 0x2c),
+	PMU_EVENT_ATTR_ID(cycles, 0x11),
+	PMU_EVENT_ATTR_ID(bus_access, 0x19),
+	PMU_EVENT_ATTR_ID(memory_error, 0x1a),
+	PMU_EVENT_ATTR_ID(bus_cycles, 0x1d),
+	PMU_EVENT_ATTR_ID(l3d_cache_allocate, 0x29),
+	PMU_EVENT_ATTR_ID(l3d_cache_refill, 0x2a),
+	PMU_EVENT_ATTR_ID(l3d_cache, 0x2b),
+	PMU_EVENT_ATTR_ID(l3d_cache_wb, 0x2c),
 	NULL,
 };
 
-- 
2.7.4


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[PATCH v2 9/9] arm64: perf: Remove redundant macro and functions in perf_event.c

[Qi Liu]

Remove ARMV8_EVENT_ATTR and armv8pmu_events_sysfs_show(), as there is
a general function for this.

Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
---
 arch/arm64/kernel/perf_event.c | 175 +++++++++++++++++++----------------------
 1 file changed, 79 insertions(+), 96 deletions(-)

diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index f594957..ee9e723 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -153,104 +153,87 @@ static const unsigned armv8_vulcan_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
 	[C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR,
 };
 
-static ssize_t
-armv8pmu_events_sysfs_show(struct device *dev,
-			   struct device_attribute *attr, char *page)
-{
-	struct perf_pmu_events_attr *pmu_attr;
-
-	pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr);
-
-	return sprintf(page, "event=0x%04llx\n", pmu_attr->id);
-}
-
-#define ARMV8_EVENT_ATTR(name, config)						\
-	(&((struct perf_pmu_events_attr) {					\
-		.attr = __ATTR(name, 0444, armv8pmu_events_sysfs_show, NULL),	\
-		.id = config,							\
-	}).attr.attr)
-
 static struct attribute *armv8_pmuv3_event_attrs[] = {
-	ARMV8_EVENT_ATTR(sw_incr, ARMV8_PMUV3_PERFCTR_SW_INCR),
-	ARMV8_EVENT_ATTR(l1i_cache_refill, ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL),
-	ARMV8_EVENT_ATTR(l1i_tlb_refill, ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL),
-	ARMV8_EVENT_ATTR(l1d_cache_refill, ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL),
-	ARMV8_EVENT_ATTR(l1d_cache, ARMV8_PMUV3_PERFCTR_L1D_CACHE),
-	ARMV8_EVENT_ATTR(l1d_tlb_refill, ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL),
-	ARMV8_EVENT_ATTR(ld_retired, ARMV8_PMUV3_PERFCTR_LD_RETIRED),
-	ARMV8_EVENT_ATTR(st_retired, ARMV8_PMUV3_PERFCTR_ST_RETIRED),
-	ARMV8_EVENT_ATTR(inst_retired, ARMV8_PMUV3_PERFCTR_INST_RETIRED),
-	ARMV8_EVENT_ATTR(exc_taken, ARMV8_PMUV3_PERFCTR_EXC_TAKEN),
-	ARMV8_EVENT_ATTR(exc_return, ARMV8_PMUV3_PERFCTR_EXC_RETURN),
-	ARMV8_EVENT_ATTR(cid_write_retired, ARMV8_PMUV3_PERFCTR_CID_WRITE_RETIRED),
-	ARMV8_EVENT_ATTR(pc_write_retired, ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED),
-	ARMV8_EVENT_ATTR(br_immed_retired, ARMV8_PMUV3_PERFCTR_BR_IMMED_RETIRED),
-	ARMV8_EVENT_ATTR(br_return_retired, ARMV8_PMUV3_PERFCTR_BR_RETURN_RETIRED),
-	ARMV8_EVENT_ATTR(unaligned_ldst_retired, ARMV8_PMUV3_PERFCTR_UNALIGNED_LDST_RETIRED),
-	ARMV8_EVENT_ATTR(br_mis_pred, ARMV8_PMUV3_PERFCTR_BR_MIS_PRED),
-	ARMV8_EVENT_ATTR(cpu_cycles, ARMV8_PMUV3_PERFCTR_CPU_CYCLES),
-	ARMV8_EVENT_ATTR(br_pred, ARMV8_PMUV3_PERFCTR_BR_PRED),
-	ARMV8_EVENT_ATTR(mem_access, ARMV8_PMUV3_PERFCTR_MEM_ACCESS),
-	ARMV8_EVENT_ATTR(l1i_cache, ARMV8_PMUV3_PERFCTR_L1I_CACHE),
-	ARMV8_EVENT_ATTR(l1d_cache_wb, ARMV8_PMUV3_PERFCTR_L1D_CACHE_WB),
-	ARMV8_EVENT_ATTR(l2d_cache, ARMV8_PMUV3_PERFCTR_L2D_CACHE),
-	ARMV8_EVENT_ATTR(l2d_cache_refill, ARMV8_PMUV3_PERFCTR_L2D_CACHE_REFILL),
-	ARMV8_EVENT_ATTR(l2d_cache_wb, ARMV8_PMUV3_PERFCTR_L2D_CACHE_WB),
-	ARMV8_EVENT_ATTR(bus_access, ARMV8_PMUV3_PERFCTR_BUS_ACCESS),
-	ARMV8_EVENT_ATTR(memory_error, ARMV8_PMUV3_PERFCTR_MEMORY_ERROR),
-	ARMV8_EVENT_ATTR(inst_spec, ARMV8_PMUV3_PERFCTR_INST_SPEC),
-	ARMV8_EVENT_ATTR(ttbr_write_retired, ARMV8_PMUV3_PERFCTR_TTBR_WRITE_RETIRED),
-	ARMV8_EVENT_ATTR(bus_cycles, ARMV8_PMUV3_PERFCTR_BUS_CYCLES),
+	PMU_EVENT_ATTR_ID(sw_incr, ARMV8_PMUV3_PERFCTR_SW_INCR),
+	PMU_EVENT_ATTR_ID(l1i_cache_refill, ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL),
+	PMU_EVENT_ATTR_ID(l1i_tlb_refill, ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL),
+	PMU_EVENT_ATTR_ID(l1d_cache_refill, ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL),
+	PMU_EVENT_ATTR_ID(l1d_cache, ARMV8_PMUV3_PERFCTR_L1D_CACHE),
+	PMU_EVENT_ATTR_ID(l1d_tlb_refill, ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL),
+	PMU_EVENT_ATTR_ID(ld_retired, ARMV8_PMUV3_PERFCTR_LD_RETIRED),
+	PMU_EVENT_ATTR_ID(st_retired, ARMV8_PMUV3_PERFCTR_ST_RETIRED),
+	PMU_EVENT_ATTR_ID(inst_retired, ARMV8_PMUV3_PERFCTR_INST_RETIRED),
+	PMU_EVENT_ATTR_ID(exc_taken, ARMV8_PMUV3_PERFCTR_EXC_TAKEN),
+	PMU_EVENT_ATTR_ID(exc_return, ARMV8_PMUV3_PERFCTR_EXC_RETURN),
+	PMU_EVENT_ATTR_ID(cid_write_retired, ARMV8_PMUV3_PERFCTR_CID_WRITE_RETIRED),
+	PMU_EVENT_ATTR_ID(pc_write_retired, ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED),
+	PMU_EVENT_ATTR_ID(br_immed_retired, ARMV8_PMUV3_PERFCTR_BR_IMMED_RETIRED),
+	PMU_EVENT_ATTR_ID(br_return_retired, ARMV8_PMUV3_PERFCTR_BR_RETURN_RETIRED),
+	PMU_EVENT_ATTR_ID(unaligned_ldst_retired, ARMV8_PMUV3_PERFCTR_UNALIGNED_LDST_RETIRED),
+	PMU_EVENT_ATTR_ID(br_mis_pred, ARMV8_PMUV3_PERFCTR_BR_MIS_PRED),
+	PMU_EVENT_ATTR_ID(cpu_cycles, ARMV8_PMUV3_PERFCTR_CPU_CYCLES),
+	PMU_EVENT_ATTR_ID(br_pred, ARMV8_PMUV3_PERFCTR_BR_PRED),
+	PMU_EVENT_ATTR_ID(mem_access, ARMV8_PMUV3_PERFCTR_MEM_ACCESS),
+	PMU_EVENT_ATTR_ID(l1i_cache, ARMV8_PMUV3_PERFCTR_L1I_CACHE),
+	PMU_EVENT_ATTR_ID(l1d_cache_wb, ARMV8_PMUV3_PERFCTR_L1D_CACHE_WB),
+	PMU_EVENT_ATTR_ID(l2d_cache, ARMV8_PMUV3_PERFCTR_L2D_CACHE),
+	PMU_EVENT_ATTR_ID(l2d_cache_refill, ARMV8_PMUV3_PERFCTR_L2D_CACHE_REFILL),
+	PMU_EVENT_ATTR_ID(l2d_cache_wb, ARMV8_PMUV3_PERFCTR_L2D_CACHE_WB),
+	PMU_EVENT_ATTR_ID(bus_access, ARMV8_PMUV3_PERFCTR_BUS_ACCESS),
+	PMU_EVENT_ATTR_ID(memory_error, ARMV8_PMUV3_PERFCTR_MEMORY_ERROR),
+	PMU_EVENT_ATTR_ID(inst_spec, ARMV8_PMUV3_PERFCTR_INST_SPEC),
+	PMU_EVENT_ATTR_ID(ttbr_write_retired, ARMV8_PMUV3_PERFCTR_TTBR_WRITE_RETIRED),
+	PMU_EVENT_ATTR_ID(bus_cycles, ARMV8_PMUV3_PERFCTR_BUS_CYCLES),
 	/* Don't expose the chain event in /sys, since it's useless in isolation */
-	ARMV8_EVENT_ATTR(l1d_cache_allocate, ARMV8_PMUV3_PERFCTR_L1D_CACHE_ALLOCATE),
-	ARMV8_EVENT_ATTR(l2d_cache_allocate, ARMV8_PMUV3_PERFCTR_L2D_CACHE_ALLOCATE),
-	ARMV8_EVENT_ATTR(br_retired, ARMV8_PMUV3_PERFCTR_BR_RETIRED),
-	ARMV8_EVENT_ATTR(br_mis_pred_retired, ARMV8_PMUV3_PERFCTR_BR_MIS_PRED_RETIRED),
-	ARMV8_EVENT_ATTR(stall_frontend, ARMV8_PMUV3_PERFCTR_STALL_FRONTEND),
-	ARMV8_EVENT_ATTR(stall_backend, ARMV8_PMUV3_PERFCTR_STALL_BACKEND),
-	ARMV8_EVENT_ATTR(l1d_tlb, ARMV8_PMUV3_PERFCTR_L1D_TLB),
-	ARMV8_EVENT_ATTR(l1i_tlb, ARMV8_PMUV3_PERFCTR_L1I_TLB),
-	ARMV8_EVENT_ATTR(l2i_cache, ARMV8_PMUV3_PERFCTR_L2I_CACHE),
-	ARMV8_EVENT_ATTR(l2i_cache_refill, ARMV8_PMUV3_PERFCTR_L2I_CACHE_REFILL),
-	ARMV8_EVENT_ATTR(l3d_cache_allocate, ARMV8_PMUV3_PERFCTR_L3D_CACHE_ALLOCATE),
-	ARMV8_EVENT_ATTR(l3d_cache_refill, ARMV8_PMUV3_PERFCTR_L3D_CACHE_REFILL),
-	ARMV8_EVENT_ATTR(l3d_cache, ARMV8_PMUV3_PERFCTR_L3D_CACHE),
-	ARMV8_EVENT_ATTR(l3d_cache_wb, ARMV8_PMUV3_PERFCTR_L3D_CACHE_WB),
-	ARMV8_EVENT_ATTR(l2d_tlb_refill, ARMV8_PMUV3_PERFCTR_L2D_TLB_REFILL),
-	ARMV8_EVENT_ATTR(l2i_tlb_refill, ARMV8_PMUV3_PERFCTR_L2I_TLB_REFILL),
-	ARMV8_EVENT_ATTR(l2d_tlb, ARMV8_PMUV3_PERFCTR_L2D_TLB),
-	ARMV8_EVENT_ATTR(l2i_tlb, ARMV8_PMUV3_PERFCTR_L2I_TLB),
-	ARMV8_EVENT_ATTR(remote_access, ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS),
-	ARMV8_EVENT_ATTR(ll_cache, ARMV8_PMUV3_PERFCTR_LL_CACHE),
-	ARMV8_EVENT_ATTR(ll_cache_miss, ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS),
-	ARMV8_EVENT_ATTR(dtlb_walk, ARMV8_PMUV3_PERFCTR_DTLB_WALK),
-	ARMV8_EVENT_ATTR(itlb_walk, ARMV8_PMUV3_PERFCTR_ITLB_WALK),
-	ARMV8_EVENT_ATTR(ll_cache_rd, ARMV8_PMUV3_PERFCTR_LL_CACHE_RD),
-	ARMV8_EVENT_ATTR(ll_cache_miss_rd, ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS_RD),
-	ARMV8_EVENT_ATTR(remote_access_rd, ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS_RD),
-	ARMV8_EVENT_ATTR(l1d_cache_lmiss_rd, ARMV8_PMUV3_PERFCTR_L1D_CACHE_LMISS_RD),
-	ARMV8_EVENT_ATTR(op_retired, ARMV8_PMUV3_PERFCTR_OP_RETIRED),
-	ARMV8_EVENT_ATTR(op_spec, ARMV8_PMUV3_PERFCTR_OP_SPEC),
-	ARMV8_EVENT_ATTR(stall, ARMV8_PMUV3_PERFCTR_STALL),
-	ARMV8_EVENT_ATTR(stall_slot_backend, ARMV8_PMUV3_PERFCTR_STALL_SLOT_BACKEND),
-	ARMV8_EVENT_ATTR(stall_slot_frontend, ARMV8_PMUV3_PERFCTR_STALL_SLOT_FRONTEND),
-	ARMV8_EVENT_ATTR(stall_slot, ARMV8_PMUV3_PERFCTR_STALL_SLOT),
-	ARMV8_EVENT_ATTR(sample_pop, ARMV8_SPE_PERFCTR_SAMPLE_POP),
-	ARMV8_EVENT_ATTR(sample_feed, ARMV8_SPE_PERFCTR_SAMPLE_FEED),
-	ARMV8_EVENT_ATTR(sample_filtrate, ARMV8_SPE_PERFCTR_SAMPLE_FILTRATE),
-	ARMV8_EVENT_ATTR(sample_collision, ARMV8_SPE_PERFCTR_SAMPLE_COLLISION),
-	ARMV8_EVENT_ATTR(cnt_cycles, ARMV8_AMU_PERFCTR_CNT_CYCLES),
-	ARMV8_EVENT_ATTR(stall_backend_mem, ARMV8_AMU_PERFCTR_STALL_BACKEND_MEM),
-	ARMV8_EVENT_ATTR(l1i_cache_lmiss, ARMV8_PMUV3_PERFCTR_L1I_CACHE_LMISS),
-	ARMV8_EVENT_ATTR(l2d_cache_lmiss_rd, ARMV8_PMUV3_PERFCTR_L2D_CACHE_LMISS_RD),
-	ARMV8_EVENT_ATTR(l2i_cache_lmiss, ARMV8_PMUV3_PERFCTR_L2I_CACHE_LMISS),
-	ARMV8_EVENT_ATTR(l3d_cache_lmiss_rd, ARMV8_PMUV3_PERFCTR_L3D_CACHE_LMISS_RD),
-	ARMV8_EVENT_ATTR(ldst_align_lat, ARMV8_PMUV3_PERFCTR_LDST_ALIGN_LAT),
-	ARMV8_EVENT_ATTR(ld_align_lat, ARMV8_PMUV3_PERFCTR_LD_ALIGN_LAT),
-	ARMV8_EVENT_ATTR(st_align_lat, ARMV8_PMUV3_PERFCTR_ST_ALIGN_LAT),
-	ARMV8_EVENT_ATTR(mem_access_checked, ARMV8_MTE_PERFCTR_MEM_ACCESS_CHECKED),
-	ARMV8_EVENT_ATTR(mem_access_checked_rd, ARMV8_MTE_PERFCTR_MEM_ACCESS_CHECKED_RD),
-	ARMV8_EVENT_ATTR(mem_access_checked_wr, ARMV8_MTE_PERFCTR_MEM_ACCESS_CHECKED_WR),
+	PMU_EVENT_ATTR_ID(l1d_cache_allocate, ARMV8_PMUV3_PERFCTR_L1D_CACHE_ALLOCATE),
+	PMU_EVENT_ATTR_ID(l2d_cache_allocate, ARMV8_PMUV3_PERFCTR_L2D_CACHE_ALLOCATE),
+	PMU_EVENT_ATTR_ID(br_retired, ARMV8_PMUV3_PERFCTR_BR_RETIRED),
+	PMU_EVENT_ATTR_ID(br_mis_pred_retired, ARMV8_PMUV3_PERFCTR_BR_MIS_PRED_RETIRED),
+	PMU_EVENT_ATTR_ID(stall_frontend, ARMV8_PMUV3_PERFCTR_STALL_FRONTEND),
+	PMU_EVENT_ATTR_ID(stall_backend, ARMV8_PMUV3_PERFCTR_STALL_BACKEND),
+	PMU_EVENT_ATTR_ID(l1d_tlb, ARMV8_PMUV3_PERFCTR_L1D_TLB),
+	PMU_EVENT_ATTR_ID(l1i_tlb, ARMV8_PMUV3_PERFCTR_L1I_TLB),
+	PMU_EVENT_ATTR_ID(l2i_cache, ARMV8_PMUV3_PERFCTR_L2I_CACHE),
+	PMU_EVENT_ATTR_ID(l2i_cache_refill, ARMV8_PMUV3_PERFCTR_L2I_CACHE_REFILL),
+	PMU_EVENT_ATTR_ID(l3d_cache_allocate, ARMV8_PMUV3_PERFCTR_L3D_CACHE_ALLOCATE),
+	PMU_EVENT_ATTR_ID(l3d_cache_refill, ARMV8_PMUV3_PERFCTR_L3D_CACHE_REFILL),
+	PMU_EVENT_ATTR_ID(l3d_cache, ARMV8_PMUV3_PERFCTR_L3D_CACHE),
+	PMU_EVENT_ATTR_ID(l3d_cache_wb, ARMV8_PMUV3_PERFCTR_L3D_CACHE_WB),
+	PMU_EVENT_ATTR_ID(l2d_tlb_refill, ARMV8_PMUV3_PERFCTR_L2D_TLB_REFILL),
+	PMU_EVENT_ATTR_ID(l2i_tlb_refill, ARMV8_PMUV3_PERFCTR_L2I_TLB_REFILL),
+	PMU_EVENT_ATTR_ID(l2d_tlb, ARMV8_PMUV3_PERFCTR_L2D_TLB),
+	PMU_EVENT_ATTR_ID(l2i_tlb, ARMV8_PMUV3_PERFCTR_L2I_TLB),
+	PMU_EVENT_ATTR_ID(remote_access, ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS),
+	PMU_EVENT_ATTR_ID(ll_cache, ARMV8_PMUV3_PERFCTR_LL_CACHE),
+	PMU_EVENT_ATTR_ID(ll_cache_miss, ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS),
+	PMU_EVENT_ATTR_ID(dtlb_walk, ARMV8_PMUV3_PERFCTR_DTLB_WALK),
+	PMU_EVENT_ATTR_ID(itlb_walk, ARMV8_PMUV3_PERFCTR_ITLB_WALK),
+	PMU_EVENT_ATTR_ID(ll_cache_rd, ARMV8_PMUV3_PERFCTR_LL_CACHE_RD),
+	PMU_EVENT_ATTR_ID(ll_cache_miss_rd, ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS_RD),
+	PMU_EVENT_ATTR_ID(remote_access_rd, ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS_RD),
+	PMU_EVENT_ATTR_ID(l1d_cache_lmiss_rd, ARMV8_PMUV3_PERFCTR_L1D_CACHE_LMISS_RD),
+	PMU_EVENT_ATTR_ID(op_retired, ARMV8_PMUV3_PERFCTR_OP_RETIRED),
+	PMU_EVENT_ATTR_ID(op_spec, ARMV8_PMUV3_PERFCTR_OP_SPEC),
+	PMU_EVENT_ATTR_ID(stall, ARMV8_PMUV3_PERFCTR_STALL),
+	PMU_EVENT_ATTR_ID(stall_slot_backend, ARMV8_PMUV3_PERFCTR_STALL_SLOT_BACKEND),
+	PMU_EVENT_ATTR_ID(stall_slot_frontend, ARMV8_PMUV3_PERFCTR_STALL_SLOT_FRONTEND),
+	PMU_EVENT_ATTR_ID(stall_slot, ARMV8_PMUV3_PERFCTR_STALL_SLOT),
+	PMU_EVENT_ATTR_ID(sample_pop, ARMV8_SPE_PERFCTR_SAMPLE_POP),
+	PMU_EVENT_ATTR_ID(sample_feed, ARMV8_SPE_PERFCTR_SAMPLE_FEED),
+	PMU_EVENT_ATTR_ID(sample_filtrate, ARMV8_SPE_PERFCTR_SAMPLE_FILTRATE),
+	PMU_EVENT_ATTR_ID(sample_collision, ARMV8_SPE_PERFCTR_SAMPLE_COLLISION),
+	PMU_EVENT_ATTR_ID(cnt_cycles, ARMV8_AMU_PERFCTR_CNT_CYCLES),
+	PMU_EVENT_ATTR_ID(stall_backend_mem, ARMV8_AMU_PERFCTR_STALL_BACKEND_MEM),
+	PMU_EVENT_ATTR_ID(l1i_cache_lmiss, ARMV8_PMUV3_PERFCTR_L1I_CACHE_LMISS),
+	PMU_EVENT_ATTR_ID(l2d_cache_lmiss_rd, ARMV8_PMUV3_PERFCTR_L2D_CACHE_LMISS_RD),
+	PMU_EVENT_ATTR_ID(l2i_cache_lmiss, ARMV8_PMUV3_PERFCTR_L2I_CACHE_LMISS),
+	PMU_EVENT_ATTR_ID(l3d_cache_lmiss_rd, ARMV8_PMUV3_PERFCTR_L3D_CACHE_LMISS_RD),
+	PMU_EVENT_ATTR_ID(ldst_align_lat, ARMV8_PMUV3_PERFCTR_LDST_ALIGN_LAT),
+	PMU_EVENT_ATTR_ID(ld_align_lat, ARMV8_PMUV3_PERFCTR_LD_ALIGN_LAT),
+	PMU_EVENT_ATTR_ID(st_align_lat, ARMV8_PMUV3_PERFCTR_ST_ALIGN_LAT),
+	PMU_EVENT_ATTR_ID(mem_access_checked, ARMV8_MTE_PERFCTR_MEM_ACCESS_CHECKED),
+	PMU_EVENT_ATTR_ID(mem_access_checked_rd, ARMV8_MTE_PERFCTR_MEM_ACCESS_CHECKED_RD),
+	PMU_EVENT_ATTR_ID(mem_access_checked_wr, ARMV8_MTE_PERFCTR_MEM_ACCESS_CHECKED_WR),
 	NULL,
 };
 
-- 
2.7.4


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RE: [PATCH v2 7/9] drivers/perf: Remove redundant macro and functions in fsl_imx8_ddr_perf.c

[Frank Li]

> -----Original Message-----
> From: Qi Liu <liuqi115@huawei.com>
> Sent: Wednesday, May 19, 2021 4:52 AM
> To: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org
> Cc: linuxarm@huawei.com; Frank Li <frank.li@nxp.com>; Will Deacon
> <will@kernel.org>; Mark Rutland <mark.rutland@arm.com>
> Subject: [PATCH v2 7/9] drivers/perf: Remove redundant macro and
> functions in fsl_imx8_ddr_perf.c
> 
> Remove IMX8_DDR_PMU_EVENT_ATTR and ddr_pmu_event_show(), as
> there is a general function for this.
> 

Reviewed by Frank Li <Frank .li@nxp.com>

> Cc: Frank Li <Frank.li@nxp.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Signed-off-by: Qi Liu <liuqi115@huawei.com>
> ---
>  drivers/perf/fsl_imx8_ddr_perf.c | 80 ++++++++++++++++------------------------
>  1 file changed, 32 insertions(+), 48 deletions(-)
> 
> diff --git a/drivers/perf/fsl_imx8_ddr_perf.c
> b/drivers/perf/fsl_imx8_ddr_perf.c
> index 2bbb931..8f2c4dd 100644
> --- a/drivers/perf/fsl_imx8_ddr_perf.c
> +++ b/drivers/perf/fsl_imx8_ddr_perf.c
> @@ -212,55 +212,39 @@ static const struct attribute_group
> ddr_perf_cpumask_attr_group = {
>  	.attrs = ddr_perf_cpumask_attrs,
>  };
> 
> -static ssize_t
> -ddr_pmu_event_show(struct device *dev, struct device_attribute *attr,
> -		   char *page)
> -{
> -	struct perf_pmu_events_attr *pmu_attr;
> -
> -	pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr);
> -	return sysfs_emit(page, "event=0x%02llx\n", pmu_attr->id);
> -}
> -
> -#define IMX8_DDR_PMU_EVENT_ATTR(_name, _id)
> 	\
> -	(&((struct perf_pmu_events_attr[]) {				\
> -		{ .attr = __ATTR(_name, 0444, ddr_pmu_event_show,
> NULL),\
> -		  .id = _id, }						\
> -	})[0].attr.attr)
> -
>  static struct attribute *ddr_perf_events_attrs[] = {
> -	IMX8_DDR_PMU_EVENT_ATTR(cycles, EVENT_CYCLES_ID),
> -	IMX8_DDR_PMU_EVENT_ATTR(selfresh, 0x01),
> -	IMX8_DDR_PMU_EVENT_ATTR(read-accesses, 0x04),
> -	IMX8_DDR_PMU_EVENT_ATTR(write-accesses, 0x05),
> -	IMX8_DDR_PMU_EVENT_ATTR(read-queue-depth, 0x08),
> -	IMX8_DDR_PMU_EVENT_ATTR(write-queue-depth, 0x09),
> -	IMX8_DDR_PMU_EVENT_ATTR(lp-read-credit-cnt, 0x10),
> -	IMX8_DDR_PMU_EVENT_ATTR(hp-read-credit-cnt, 0x11),
> -	IMX8_DDR_PMU_EVENT_ATTR(write-credit-cnt, 0x12),
> -	IMX8_DDR_PMU_EVENT_ATTR(read-command, 0x20),
> -	IMX8_DDR_PMU_EVENT_ATTR(write-command, 0x21),
> -	IMX8_DDR_PMU_EVENT_ATTR(read-modify-write-command, 0x22),
> -	IMX8_DDR_PMU_EVENT_ATTR(hp-read, 0x23),
> -	IMX8_DDR_PMU_EVENT_ATTR(hp-req-nocredit, 0x24),
> -	IMX8_DDR_PMU_EVENT_ATTR(hp-xact-credit, 0x25),
> -	IMX8_DDR_PMU_EVENT_ATTR(lp-req-nocredit, 0x26),
> -	IMX8_DDR_PMU_EVENT_ATTR(lp-xact-credit, 0x27),
> -	IMX8_DDR_PMU_EVENT_ATTR(wr-xact-credit, 0x29),
> -	IMX8_DDR_PMU_EVENT_ATTR(read-cycles, 0x2a),
> -	IMX8_DDR_PMU_EVENT_ATTR(write-cycles, 0x2b),
> -	IMX8_DDR_PMU_EVENT_ATTR(read-write-transition, 0x30),
> -	IMX8_DDR_PMU_EVENT_ATTR(precharge, 0x31),
> -	IMX8_DDR_PMU_EVENT_ATTR(activate, 0x32),
> -	IMX8_DDR_PMU_EVENT_ATTR(load-mode, 0x33),
> -	IMX8_DDR_PMU_EVENT_ATTR(perf-mwr, 0x34),
> -	IMX8_DDR_PMU_EVENT_ATTR(read, 0x35),
> -	IMX8_DDR_PMU_EVENT_ATTR(read-activate, 0x36),
> -	IMX8_DDR_PMU_EVENT_ATTR(refresh, 0x37),
> -	IMX8_DDR_PMU_EVENT_ATTR(write, 0x38),
> -	IMX8_DDR_PMU_EVENT_ATTR(raw-hazard, 0x39),
> -	IMX8_DDR_PMU_EVENT_ATTR(axid-read, 0x41),
> -	IMX8_DDR_PMU_EVENT_ATTR(axid-write, 0x42),
> +	PMU_EVENT_ATTR_ID(cycles, EVENT_CYCLES_ID),
> +	PMU_EVENT_ATTR_ID(selfresh, 0x01),
> +	PMU_EVENT_ATTR_ID(read-accesses, 0x04),
> +	PMU_EVENT_ATTR_ID(write-accesses, 0x05),
> +	PMU_EVENT_ATTR_ID(read-queue-depth, 0x08),
> +	PMU_EVENT_ATTR_ID(write-queue-depth, 0x09),
> +	PMU_EVENT_ATTR_ID(lp-read-credit-cnt, 0x10),
> +	PMU_EVENT_ATTR_ID(hp-read-credit-cnt, 0x11),
> +	PMU_EVENT_ATTR_ID(write-credit-cnt, 0x12),
> +	PMU_EVENT_ATTR_ID(read-command, 0x20),
> +	PMU_EVENT_ATTR_ID(write-command, 0x21),
> +	PMU_EVENT_ATTR_ID(read-modify-write-command, 0x22),
> +	PMU_EVENT_ATTR_ID(hp-read, 0x23),
> +	PMU_EVENT_ATTR_ID(hp-req-nocredit, 0x24),
> +	PMU_EVENT_ATTR_ID(hp-xact-credit, 0x25),
> +	PMU_EVENT_ATTR_ID(lp-req-nocredit, 0x26),
> +	PMU_EVENT_ATTR_ID(lp-xact-credit, 0x27),
> +	PMU_EVENT_ATTR_ID(wr-xact-credit, 0x29),
> +	PMU_EVENT_ATTR_ID(read-cycles, 0x2a),
> +	PMU_EVENT_ATTR_ID(write-cycles, 0x2b),
> +	PMU_EVENT_ATTR_ID(read-write-transition, 0x30),
> +	PMU_EVENT_ATTR_ID(precharge, 0x31),
> +	PMU_EVENT_ATTR_ID(activate, 0x32),
> +	PMU_EVENT_ATTR_ID(load-mode, 0x33),
> +	PMU_EVENT_ATTR_ID(perf-mwr, 0x34),
> +	PMU_EVENT_ATTR_ID(read, 0x35),
> +	PMU_EVENT_ATTR_ID(read-activate, 0x36),
> +	PMU_EVENT_ATTR_ID(refresh, 0x37),
> +	PMU_EVENT_ATTR_ID(write, 0x38),
> +	PMU_EVENT_ATTR_ID(raw-hazard, 0x39),
> +	PMU_EVENT_ATTR_ID(axid-read, 0x41),
> +	PMU_EVENT_ATTR_ID(axid-write, 0x42),
>  	NULL,
>  };
> 
> --
> 2.7.4


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Re: [PATCH v2 1/9] perf: Add EVENT_ATTR_ID to simplify event attributes

[Will Deacon]

On Wed, May 19, 2021 at 05:51:51PM +0800, Qi Liu wrote:
> Similar EVENT_ATTR macros are defined in many PMU drivers,
> like HiSilicon PMU driver, Arm PMU driver, Arm SMMU PMU
> driver. So Add a generic macro to simplify code.
> 
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Ingo Molnar <mingo@redhat.com>
> Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
> Signed-off-by: Qi Liu <liuqi115@huawei.com>
> ---
>  include/linux/perf_event.h | 6 ++++++
>  kernel/events/core.c       | 2 ++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
> index f5a6a2f..d0aa74e 100644
> --- a/include/linux/perf_event.h
> +++ b/include/linux/perf_event.h
> @@ -1576,6 +1576,12 @@ static struct perf_pmu_events_attr _var = {				    \
>  	.event_str	= _str,						    \
>  };
>  
> +#define PMU_EVENT_ATTR_ID(_name, _id)					     \
> +	(&((struct perf_pmu_events_attr[]) {				     \
> +		{ .attr = __ATTR(_name, 0444, perf_event_sysfs_show, NULL),  \
> +		  .id = _id, }						     \
> +	})[0].attr.attr)
> +
>  #define PMU_FORMAT_ATTR(_name, _format)					\
>  static ssize_t								\
>  _name##_show(struct device *dev,					\
> diff --git a/kernel/events/core.c b/kernel/events/core.c
> index 0ac818b..330d9cc 100644
> --- a/kernel/events/core.c
> +++ b/kernel/events/core.c
> @@ -13295,6 +13295,8 @@ ssize_t perf_event_sysfs_show(struct device *dev, struct device_attribute *attr,
>  
>  	if (pmu_attr->event_str)
>  		return sprintf(page, "%s\n", pmu_attr->event_str);
> +	else
> +		return sprintf(page, "config=%#llx\n", pmu_attr->id);

I think it's a really bad idea to hardcode this here. For example, I think
this patch series breaks user ABI for the SMMU PMU which used to print:

	"event=0x%02llx\n"

and by the looks of it many of the other conversions are unsound too.

I'm all for a common macro, but the string needs to be determined by the
driver.

Will

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Re: [PATCH v2 1/9] perf: Add EVENT_ATTR_ID to simplify event attributes

[liuqi (BA)]

Hi Will,

Thanks for reviewing this patch.

On 2021/6/1 21:10, Will Deacon wrote:
> On Wed, May 19, 2021 at 05:51:51PM +0800, Qi Liu wrote:
>> Similar EVENT_ATTR macros are defined in many PMU drivers,
>> like HiSilicon PMU driver, Arm PMU driver, Arm SMMU PMU
>> driver. So Add a generic macro to simplify code.
>>
>> Cc: Peter Zijlstra <peterz@infradead.org>
>> Cc: Ingo Molnar <mingo@redhat.com>
>> Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
>> Cc: Mark Rutland <mark.rutland@arm.com>
>> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
>> Signed-off-by: Qi Liu <liuqi115@huawei.com>
>> ---
>>   include/linux/perf_event.h | 6 ++++++
>>   kernel/events/core.c       | 2 ++
>>   2 files changed, 8 insertions(+)
>>
>> diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
>> index f5a6a2f..d0aa74e 100644
>> --- a/include/linux/perf_event.h
>> +++ b/include/linux/perf_event.h
>> @@ -1576,6 +1576,12 @@ static struct perf_pmu_events_attr _var = {				    \
>>   	.event_str	= _str,						    \
>>   };
>>   
>> +#define PMU_EVENT_ATTR_ID(_name, _id)					     \
>> +	(&((struct perf_pmu_events_attr[]) {				     \
>> +		{ .attr = __ATTR(_name, 0444, perf_event_sysfs_show, NULL),  \
>> +		  .id = _id, }						     \
>> +	})[0].attr.attr)
>> +
>>   #define PMU_FORMAT_ATTR(_name, _format)					\
>>   static ssize_t								\
>>   _name##_show(struct device *dev,					\
>> diff --git a/kernel/events/core.c b/kernel/events/core.c
>> index 0ac818b..330d9cc 100644
>> --- a/kernel/events/core.c
>> +++ b/kernel/events/core.c
>> @@ -13295,6 +13295,8 @@ ssize_t perf_event_sysfs_show(struct device *dev, struct device_attribute *attr,
>>   
>>   	if (pmu_attr->event_str)
>>   		return sprintf(page, "%s\n", pmu_attr->event_str);
>> +	else
>> +		return sprintf(page, "config=%#llx\n", pmu_attr->id);
> 
> I think it's a really bad idea to hardcode this here. For example, I think
> this patch series breaks user ABI for the SMMU PMU which used to print:
> 
> 	"event=0x%02llx\n"
> 
> and by the looks of it many of the other conversions are unsound too.
> 
Got it, so I'll use pmu_attr->event_str here, for example,
SMMU_EVENT_ATTR(cycles, "event=0x00")

As PMU_EVENT_ATTR_STRING is already defined in linux/perf_event.h，and is 
used in drivers of multi architectures, add a new common macro might be 
better than modify PMU_EVENT_ATTR_STRING.
Do you have any suggestion about the name of new common macro?

Thanks,
Qi
> I'm all for a common macro, but the string needs to be determined by the
> driver.
> 
> Will
> .
> 





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Re: [PATCH v2 1/9] perf: Add EVENT_ATTR_ID to simplify event attributes

[Will Deacon]

On Wed, Jun 02, 2021 at 04:45:23PM +0800, liuqi (BA) wrote:
> 
> Hi Will,
> 
> Thanks for reviewing this patch.
> 
> On 2021/6/1 21:10, Will Deacon wrote:
> > On Wed, May 19, 2021 at 05:51:51PM +0800, Qi Liu wrote:
> > > Similar EVENT_ATTR macros are defined in many PMU drivers,
> > > like HiSilicon PMU driver, Arm PMU driver, Arm SMMU PMU
> > > driver. So Add a generic macro to simplify code.
> > > 
> > > Cc: Peter Zijlstra <peterz@infradead.org>
> > > Cc: Ingo Molnar <mingo@redhat.com>
> > > Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
> > > Cc: Mark Rutland <mark.rutland@arm.com>
> > > Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
> > > Signed-off-by: Qi Liu <liuqi115@huawei.com>
> > > ---
> > >   include/linux/perf_event.h | 6 ++++++
> > >   kernel/events/core.c       | 2 ++
> > >   2 files changed, 8 insertions(+)
> > > 
> > > diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
> > > index f5a6a2f..d0aa74e 100644
> > > --- a/include/linux/perf_event.h
> > > +++ b/include/linux/perf_event.h
> > > @@ -1576,6 +1576,12 @@ static struct perf_pmu_events_attr _var = {				    \
> > >   	.event_str	= _str,						    \
> > >   };
> > > +#define PMU_EVENT_ATTR_ID(_name, _id)					     \
> > > +	(&((struct perf_pmu_events_attr[]) {				     \
> > > +		{ .attr = __ATTR(_name, 0444, perf_event_sysfs_show, NULL),  \
> > > +		  .id = _id, }						     \
> > > +	})[0].attr.attr)
> > > +
> > >   #define PMU_FORMAT_ATTR(_name, _format)					\
> > >   static ssize_t								\
> > >   _name##_show(struct device *dev,					\
> > > diff --git a/kernel/events/core.c b/kernel/events/core.c
> > > index 0ac818b..330d9cc 100644
> > > --- a/kernel/events/core.c
> > > +++ b/kernel/events/core.c
> > > @@ -13295,6 +13295,8 @@ ssize_t perf_event_sysfs_show(struct device *dev, struct device_attribute *attr,
> > >   	if (pmu_attr->event_str)
> > >   		return sprintf(page, "%s\n", pmu_attr->event_str);
> > > +	else
> > > +		return sprintf(page, "config=%#llx\n", pmu_attr->id);
> > 
> > I think it's a really bad idea to hardcode this here. For example, I think
> > this patch series breaks user ABI for the SMMU PMU which used to print:
> > 
> > 	"event=0x%02llx\n"
> > 
> > and by the looks of it many of the other conversions are unsound too.
> > 
> Got it, so I'll use pmu_attr->event_str here, for example,
> SMMU_EVENT_ATTR(cycles, "event=0x00")

You could, but honestly I don't really see this being any better than the
current code. The advantage of using "event=0x%02llx\n" is that things are
consistent by construction and therefore userspace can parse the information
easily. We lose that if we just hardcode the string and it's error-prone to
extend.

Will

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Re: [PATCH v2 1/9] perf: Add EVENT_ATTR_ID to simplify event attributes

[liuqi (BA)]

Hi Will,
On 2021/6/2 17:49, Will Deacon wrote:
> On Wed, Jun 02, 2021 at 04:45:23PM +0800, liuqi (BA) wrote:
>>
>> Hi Will,
>>
>> Thanks for reviewing this patch.
>>
>> On 2021/6/1 21:10, Will Deacon wrote:
>>> On Wed, May 19, 2021 at 05:51:51PM +0800, Qi Liu wrote:
>>>> Similar EVENT_ATTR macros are defined in many PMU drivers,
>>>> like HiSilicon PMU driver, Arm PMU driver, Arm SMMU PMU
>>>> driver. So Add a generic macro to simplify code.
>>>>
>>>> Cc: Peter Zijlstra <peterz@infradead.org>
>>>> Cc: Ingo Molnar <mingo@redhat.com>
>>>> Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
>>>> Cc: Mark Rutland <mark.rutland@arm.com>
>>>> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
>>>> Signed-off-by: Qi Liu <liuqi115@huawei.com>
>>>> ---
>>>>    include/linux/perf_event.h | 6 ++++++
>>>>    kernel/events/core.c       | 2 ++
>>>>    2 files changed, 8 insertions(+)
>>>>
>>>> diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
>>>> index f5a6a2f..d0aa74e 100644
>>>> --- a/include/linux/perf_event.h
>>>> +++ b/include/linux/perf_event.h
>>>> @@ -1576,6 +1576,12 @@ static struct perf_pmu_events_attr _var = {				    \
>>>>    	.event_str	= _str,						    \
>>>>    };
>>>> +#define PMU_EVENT_ATTR_ID(_name, _id)					     \
>>>> +	(&((struct perf_pmu_events_attr[]) {				     \
>>>> +		{ .attr = __ATTR(_name, 0444, perf_event_sysfs_show, NULL),  \
>>>> +		  .id = _id, }						     \
>>>> +	})[0].attr.attr)
>>>> +
>>>>    #define PMU_FORMAT_ATTR(_name, _format)					\
>>>>    static ssize_t								\
>>>>    _name##_show(struct device *dev,					\
>>>> diff --git a/kernel/events/core.c b/kernel/events/core.c
>>>> index 0ac818b..330d9cc 100644
>>>> --- a/kernel/events/core.c
>>>> +++ b/kernel/events/core.c
>>>> @@ -13295,6 +13295,8 @@ ssize_t perf_event_sysfs_show(struct device *dev, struct device_attribute *attr,
>>>>    	if (pmu_attr->event_str)
>>>>    		return sprintf(page, "%s\n", pmu_attr->event_str);
>>>> +	else
>>>> +		return sprintf(page, "config=%#llx\n", pmu_attr->id);
>>>
>>> I think it's a really bad idea to hardcode this here. For example, I think
>>> this patch series breaks user ABI for the SMMU PMU which used to print:
>>>
>>> 	"event=0x%02llx\n"
>>>
>>> and by the looks of it many of the other conversions are unsound too.
>>>
>> Got it, so I'll use pmu_attr->event_str here, for example,
>> SMMU_EVENT_ATTR(cycles, "event=0x00")
> 
> You could, but honestly I don't really see this being any better than the
> current code. The advantage of using "event=0x%02llx\n" is that things are
> consistent by construction and therefore userspace can parse the information
> easily. We lose that if we just hardcode the string and it's error-prone to
> extend.
> 
> Will
Got it, thanks.
So how about adding a common macro like this:

#define PMU_EVENT_ATTR_ID(_name,_func, _id)					     \
(&((struct perf_pmu_events_attr[]) {				     \
	{ .attr = __ATTR(_name, 0444, _func, NULL),  \
	  .id = _id, }						     \
})[0].attr.attr)

Drivers could define thir private macro, like SMMU_PMU_EVENT_ATTR, and 
use their private event_show() functions if they need, or use the common 
function perf_event_sysfs_show().

Thanks,
Qi
> .
> 


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