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[188.155.177.222]) by smtp.gmail.com with ESMTPSA id i25sm2790842edv.29.2021.07.15.11.46.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jul 2021 11:46:51 -0700 (PDT) From: Krzysztof Kozlowski To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alim Akhtar , robh+dt@kernel.org Cc: Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org Subject: Re: [PATCH v2 1/2] arm64: dts: exynos7: Add cpu cache information Date: Thu, 15 Jul 2021 20:46:47 +0200 Message-Id: <162637471053.9353.33889175866144667.b4-ty@canonical.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210622130551.67446-1-alim.akhtar@samsung.com> References: <20210622130551.67446-1-alim.akhtar@samsung.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210715_114703_382674_ADC5DE90 X-CRM114-Status: GOOD ( 11.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 22 Jun 2021 18:35:50 +0530, Alim Akhtar wrote: > This patch adds cpu caches information to its dt > nodes so that the same is available to userspace > via sysfs. > This SoC has 48/32 KB I/D cache for each cores > and 2MB of L2 cache. Applied, thanks! [1/2] arm64: dts: exynos7: Add cpu cache information commit: 43e7b8b864cc5319f323dfedf633071a434410f7 [2/2] arm64: dts: exynos5433: Add cpu cache information commit: d5c65c4aa23c52226067d7882ba2ce2055c9315d Best regards, -- Krzysztof Kozlowski _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel