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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id k28-20020a05680808dc00b00342df642fd3sm710126oij.48.2022.09.30.12.55.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Sep 2022 12:55:25 -0700 (PDT) Received: (nullmailer pid 777338 invoked by uid 1000); Fri, 30 Sep 2022 19:55:24 -0000 Date: Fri, 30 Sep 2022 14:55:24 -0500 From: Rob Herring To: Johan Jonker Cc: linux-pwm@vger.kernel.org, thierry.reding@gmail.com, linux-rockchip@lists.infradead.org, u.kleine-koenig@pengutronix.de, krzysztof.kozlowski+dt@linaro.org, wxt@rock-chips.com, linux-kernel@vger.kernel.org, heiko@sntech.de, robh+dt@kernel.org, devicetree@vger.kernel.org, kever.yang@rock-chips.com, sebastian.reichel@collabora.com, linux-arm-kernel@lists.infradead.org Subject: Re: [RFC PATCH v1 1/2] dt-bindings: pwm: rockchip: add interrupts property Message-ID: <166456772354.777288.8174901492888529492.robh@kernel.org> References: <94bcb278-7bb9-d173-497c-fe12682c4a17@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <94bcb278-7bb9-d173-497c-fe12682c4a17@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220930_125527_485235_A71CB65C X-CRM114-Status: GOOD ( 15.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 29 Sep 2022 16:04:00 +0200, Johan Jonker wrote: > The Rockchip SoCs have 4 or more built-in PWM channels. > > Configurable to operate in capture mode. > Measures the high/low polarity effective cycles of this input waveform > Generates a single interrupt at the transition of input waveform polarity > > Configurable to operate in continuous mode or one-shot mode. > One-shot operation will produce N + 1 periods of the waveform, > where N is the repeat counter value, and generates a single interrupt at > the end of operation. > Continuous mode generates the waveform continuously and > do not generates any interrupts. > > Older SoCs have an interrupt for each node. > Newer models share an interrupt. > > Add interrupts property to the pwm-rockchip.yaml file. > DT describes hardware. Rockchip PWM driver support for > interrupts might not available. > > Signed-off-by: Johan Jonker > --- > Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml | 3 +++ > 1 file changed, 3 insertions(+) > Acked-by: Rob Herring _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel