From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E81DAC433E0 for ; Fri, 3 Jul 2020 14:13:46 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B60ED206BE for ; Fri, 3 Jul 2020 14:13:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="w50z13h4" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B60ED206BE Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=sntech.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=LV17tFnmo9Vpn4WkdbuaBsOGpvRuTXKR2GvJlrOgCxQ=; b=w50z13h4G5VG3E/T+nMUYafuS PhGIriCDgSQQtZMcdnNcABwmnogsUVaK0hkTi+0AL9DRPWDv7Mj5JxPE55akDJ1UJ4Mi5SvN0eLWZ e+e/ZDiSWuYPNgf8TSpA6SKmRKBKcwjhstGhPhGNoIcIRfTn+NxU+sPhkIo04RcdPlSEkVjLIdoH9 M0PWjosWfq39tc2TLuTms/qv1rOiF+necs8FoMZYEqgH/OGfQ5wI5YI3JyM3abjng0LL8KcNwvIDG H+D/Cvkolvr4nGrE0okQElcqrww4e+MOBsyn+gSR+KDqMa89xalFcq6rWbyKKhugkJeIk36gxiIy7 gw/+Pw2eQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jrMQ5-0007p2-Oo; Fri, 03 Jul 2020 14:12:01 +0000 Received: from gloria.sntech.de ([185.11.138.130]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jrMQ1-0007o4-Uj; Fri, 03 Jul 2020 14:11:58 +0000 Received: from p5b127e6f.dip0.t-ipconnect.de ([91.18.126.111] helo=phil.localnet) by gloria.sntech.de with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1jrMPr-0001Ch-St; Fri, 03 Jul 2020 16:11:47 +0200 From: Heiko Stuebner To: Jagan Teki Subject: Re: [PATCH v4 1/2] clk: rockchip: rk3288: Handle clock tree for rk3288w Date: Fri, 03 Jul 2020 16:11:46 +0200 Message-ID: <1793210.9Kb5SQUFvz@phil> In-Reply-To: References: <20200602080644.11333-1-mylene.josserand@collabora.com> <20200602080644.11333-2-mylene.josserand@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200703_101158_000579_6581433D X-CRM114-Status: GOOD ( 25.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?ISO-8859-1?Q?Myl=E8ne?= Josserand , devicetree , Stephen Boyd , Michael Turquette , linux-kernel , "open list:ARM/Rockchip SoC..." , Rob Herring , kernel@collabora.com, linux-clk , linux-arm-kernel Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Jagan, Am Montag, 29. Juni 2020, 21:11:03 CEST schrieb Jagan Teki: > On Tue, Jun 2, 2020 at 1:37 PM Myl=E8ne Josserand > wrote: > > > > The revision rk3288w has a different clock tree about "hclk_vio" > > clock, according to the BSP kernel code. > > > > This patch handles this difference by detecting which device-tree > > we are using. If it is a "rockchip,rk3288-cru", let's register > > the clock tree as it was before. If the device-tree node is > > "rockchip,rk3288w-cru", we will apply the difference with this > > version of this SoC. > > > > Noticed that this new device-tree compatible must be handled in > > bootloader such as u-boot. > > > > Signed-off-by: Myl=E8ne Josserand > > --- > > drivers/clk/rockchip/clk-rk3288.c | 20 ++++++++++++++++++-- > > 1 file changed, 18 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/c= lk-rk3288.c > > index cc2a177bbdbf..204976e2d0cb 100644 > > --- a/drivers/clk/rockchip/clk-rk3288.c > > +++ b/drivers/clk/rockchip/clk-rk3288.c > > @@ -425,8 +425,6 @@ static struct rockchip_clk_branch rk3288_clk_branch= es[] __initdata =3D { > > COMPOSITE(0, "aclk_vio0", mux_pll_src_cpll_gpll_usb480m_p, CLK_= IGNORE_UNUSED, > > RK3288_CLKSEL_CON(31), 6, 2, MFLAGS, 0, 5, DFLA= GS, > > RK3288_CLKGATE_CON(3), 0, GFLAGS), > > - DIV(0, "hclk_vio", "aclk_vio0", 0, > > - RK3288_CLKSEL_CON(28), 8, 5, DFLAGS), > > COMPOSITE(0, "aclk_vio1", mux_pll_src_cpll_gpll_usb480m_p, CLK_= IGNORE_UNUSED, > > RK3288_CLKSEL_CON(31), 14, 2, MFLAGS, 8, 5, DFL= AGS, > > RK3288_CLKGATE_CON(3), 2, GFLAGS), > > @@ -819,6 +817,16 @@ static struct rockchip_clk_branch rk3288_clk_branc= hes[] __initdata =3D { > > INVERTER(0, "pclk_isp", "pclk_isp_in", RK3288_CLKSEL_CON(29), 3= , IFLAGS), > > }; > > > > +static struct rockchip_clk_branch rk3288w_hclkvio_branch[] __initdata = =3D { > > + DIV(0, "hclk_vio", "aclk_vio1", 0, > > + RK3288_CLKSEL_CON(28), 8, 5, DFLAGS), > > +}; > > + > > +static struct rockchip_clk_branch rk3288_hclkvio_branch[] __initdata = =3D { > > + DIV(0, "hclk_vio", "aclk_vio0", 0, > > + RK3288_CLKSEL_CON(28), 8, 5, DFLAGS), > > +}; > > + > > static const char *const rk3288_critical_clocks[] __initconst =3D { > > "aclk_cpu", > > "aclk_peri", > > @@ -936,6 +944,14 @@ static void __init rk3288_clk_init(struct device_n= ode *np) > > RK3288_GRF_SOC_STATUS1); > > rockchip_clk_register_branches(ctx, rk3288_clk_branches, > > ARRAY_SIZE(rk3288_clk_branches)); > > + > > + if (of_device_is_compatible(np, "rockchip,rk3288w-cru")) > > + rockchip_clk_register_branches(ctx, rk3288w_hclkvio_bra= nch, > > + ARRAY_SIZE(rk3288w_hclkv= io_branch)); > > + else > > + rockchip_clk_register_branches(ctx, rk3288_hclkvio_bran= ch, > > + ARRAY_SIZE(rk3288_hclkvi= o_branch)); > > + > = > Sorry for the late query on this. I am a bit unclear about this > compatible change, does Linux expect to replace rockchip,rk3288-cru > with rockchip,rk3288w-cru in bootloader if the chip is RK3288w? or > append the existing cru compatible node with rockchip,rk3288w-cru? > because replace new cru node make clock never probe since the > CLK_OF_DECLARE checking rockchip,rk3288-cru I guess right now we'd expect "rockchip,rk3288w-cru", "rockchip,rk3288-cru", Thinking again about this, I'm wondering if we should switch to having only one per variant ... like on the two rk3188 variants, so declaring separate rk3288-cru and rk3288w-cru of-clks with shared common code. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel