From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Andrew Murray <andrew.murray@arm.com>,
Masahiro Yamada <yamada.masahiro@socionext.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org,
Masami Hiramatsu <masami.hiramatsu@linaro.org>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Jassi Brar <jaswinder.singh@linaro.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 0/2] PCI: Add new UniPhier PCIe endpoint driver
Date: Wed, 22 Apr 2020 14:13:06 +0900 [thread overview]
Message-ID: <18cf881e-1d80-76bc-8c91-2fa9fa633558@socionext.com> (raw)
In-Reply-To: <1584956454-8829-1-git-send-email-hayashi.kunihiko@socionext.com>
On 2020/03/23 18:40, Kunihiko Hayashi wrote:
> This series adds PCIe endpoint controller driver for Socionext UniPhier
> SoCs. This controller is based on the DesignWare PCIe core.
>
> This driver supports Pro5 SoC only, so Pro5 needs multiple clocks and
> resets in devicetree node.
>
> Changes since v2:
> - dt-bindings: Add clock-names, reset-names, and fix example for Pro5
> - Remove 'is_legacy' indicating that the compatible is for legacy SoC
> - Use pci_epc_features instead of defining uniphier_soc_data
> - Remove redundant register read access
> - Clean up return code on uniphier_add_pcie_ep()
> - typo: intx -> INTx
>
> Changes since v1:
> - dt-bindings: Add Reviewed-by line
> - Fix register value to set EP mode
> - Add error message when failed to get phy
> - Replace INTx assertion time with macro
>
> Kunihiko Hayashi (2):
> dt-bindings: PCI: Add UniPhier PCIe endpoint controller description
> PCI: uniphier: Add Socionext UniPhier Pro5 PCIe endpoint controller
> driver
>
> .../devicetree/bindings/pci/uniphier-pcie-ep.txt | 53 +++
> MAINTAINERS | 4 +-
> drivers/pci/controller/dwc/Kconfig | 13 +-
> drivers/pci/controller/dwc/Makefile | 1 +
> drivers/pci/controller/dwc/pcie-uniphier-ep.c | 380 +++++++++++++++++++++
> 5 files changed, 447 insertions(+), 4 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/pci/uniphier-pcie-ep.txt
> create mode 100644 drivers/pci/controller/dwc/pcie-uniphier-ep.c
>
Gentle ping.
Are there any comments about changes since v2?
v2: https://www.spinics.net/lists/linux-pci/msg92429.html
Thank you,
---
Best Regards
Kunihiko Hayashi
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prev parent reply other threads:[~2020-04-22 5:13 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-23 9:40 [PATCH v3 0/2] PCI: Add new UniPhier PCIe endpoint driver Kunihiko Hayashi
2020-03-23 9:40 ` [PATCH v3 1/2] dt-bindings: PCI: Add UniPhier PCIe endpoint controller description Kunihiko Hayashi
2020-05-08 8:39 ` Kunihiko Hayashi
2020-03-23 9:40 ` [PATCH v3 2/2] PCI: uniphier: Add Socionext UniPhier Pro5 PCIe endpoint controller driver Kunihiko Hayashi
2020-05-07 19:33 ` Rob Herring
2020-05-08 8:32 ` Kunihiko Hayashi
2020-04-22 5:13 ` Kunihiko Hayashi [this message]
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