From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1344C433DF for ; Tue, 28 Jul 2020 16:39:15 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BCFFB2053B for ; Tue, 28 Jul 2020 16:39:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="SYWkq+V5"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="2I46v+1m" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BCFFB2053B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-ID:References:In-Reply-To:Subject:To:From: Date:MIME-Version:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=HRfX3JfL0pNleuyx51QgKsrAP6o63/T5S4afkepn4ZQ=; b=SYWkq+V566S4Zj4PAiRiqerSc q4iw2XRmeGv1sghn+H2WXqvF0IG4UqZPLkFXLXVG8sWRNtepB+i11NzVQx+9KM7xzp6kzipiPQifJ wbKq5ZxpNPuqAV/Z24746BHLpcr3CLId5qmAuLTh7hiQhqwxNQh/Sp3WZGrP92HK9Xmsc0BrwNu6O gKZz8emIIskuZJn26TSC/kRn98jwTuIGAMjHXJt2Yyr6qfOJdU4T6HoVKeZE9E1SRReKgboPlNU8J iQKtjIJze2AMBX+Z9YJMSmvqBfog5rWqFMkn2F7Ckvft4GvSxSdYrJ+y6LlYQT6q/gMCgy5KOVnhQ HJ864kXAA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k0Sc6-00058k-Be; Tue, 28 Jul 2020 16:38:02 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1k0Sc3-00057p-U0 for linux-arm-kernel@lists.infradead.org; Tue, 28 Jul 2020 16:38:00 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1ABAD2053B; Tue, 28 Jul 2020 16:37:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1595954279; bh=UaTT6eelrtF58zWytNG0egvpELFC0XFjYD4HTtCZOO0=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=2I46v+1m8oKmJ9VQeo6N0nZjzcRmXs1Ru/C4qbubwOnEDs27BOFW3Kl+HdEPSSiBk fu7YtYgh8gzbomyi98+V8kVZYGGWkFSh6gateSBafHcHZIcZ4DjQC26w9JylQyHBzx y4cWhePYSIuGjTcYQT0/UjYg1ZER9QYZh1A14SgU= Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1k0Sc1-00FiFS-5h; Tue, 28 Jul 2020 17:37:57 +0100 MIME-Version: 1.0 Date: Tue, 28 Jul 2020 17:37:57 +0100 From: Marc Zyngier To: Grzegorz Jaszczyk Subject: Re: [PATCH v4 3/5] irqchip/irq-pruss-intc: Add logic for handling reserved interrupts In-Reply-To: <1595927918-19845-4-git-send-email-grzegorz.jaszczyk@linaro.org> References: <1595927918-19845-1-git-send-email-grzegorz.jaszczyk@linaro.org> <1595927918-19845-4-git-send-email-grzegorz.jaszczyk@linaro.org> User-Agent: Roundcube Webmail/1.4.5 Message-ID: <1ae8b42d0e7a09caf01197b11cea2fff@kernel.org> X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: grzegorz.jaszczyk@linaro.org, tglx@linutronix.de, jason@lakedaemon.net, s-anna@ti.com, robh+dt@kernel.org, lee.jones@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, david@lechnology.com, wmills@ti.com, praneeth@ti.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200728_123800_096747_03206DFB X-CRM114-Status: GOOD ( 20.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-omap@vger.kernel.org, jason@lakedaemon.net, praneeth@ti.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, tglx@linutronix.de, lee.jones@linaro.org, wmills@ti.com, linux-arm-kernel@lists.infradead.org, david@lechnology.com Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-07-28 10:18, Grzegorz Jaszczyk wrote: > From: Suman Anna > > The PRUSS INTC has a fixed number of output interrupt lines that are > connected to a number of processors or other PRUSS instances or other > devices (like DMA) on the SoC. The output interrupt lines 2 through 9 > are usually connected to the main Arm host processor and are referred > to as host interrupts 0 through 7 from ARM/MPU perspective. > > All of these 8 host interrupts are not always exclusively connected > to the Arm interrupt controller. Some SoCs have some interrupt lines > not connected to the Arm interrupt controller at all, while a few > others > have the interrupt lines connected to multiple processors in which they > need to be partitioned as per SoC integration needs. For example, > AM437x > and 66AK2G SoCs have 2 PRUSS instances each and have the host interrupt > 5 > connected to the other PRUSS, while AM335x has host interrupt 0 shared > between MPU and TSC_ADC and host interrupts 6 & 7 shared between MPU > and > a DMA controller. > > Add logic to the PRUSS INTC driver to ignore both these shared and > invalid interrupts. > > Signed-off-by: Suman Anna > Signed-off-by: Grzegorz Jaszczyk > --- > v3->v4: > - Due to changes in DT bindings which converts irqs-reserved > property from uint8-array to bitmask requested by Rob introduce > relevant changes in the driver. > - Merge the irqs-reserved and irqs-shared to one property since they > can be handled by one logic (relevant change was introduced to DT > binding). This isn't what I asked for in my initial review. I repeatedly asked for the *handling* to be common, not for the properties to be merged. I don't mind either way, but I understood there were two properties for a good reason. Has this reason gone? Anyway, I'll come back to it once I start reviewing the series again. M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel