From: mark.rutland@arm.com (Mark Rutland)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] generic: Add the exception case checking routine for ppi interrupt
Date: Tue, 30 Aug 2016 12:21:13 +0100 [thread overview]
Message-ID: <20160830112113.GE1223@leverpostej> (raw)
In-Reply-To: <57C568F8.20802@arm.com>
On Tue, Aug 30, 2016 at 12:07:36PM +0100, Marc Zyngier wrote:
> +Mark
> On 30/08/16 11:35, majun (F) wrote:
> > ? 2016/8/30 16:50, Marc Zyngier ??:
> >> On 30/08/16 05:17, MaJun wrote:
> >>> From: Ma Jun <majun258@huawei.com>
> >>>
> >>> During system booting, if the interrupt which has no action registered
> >>> is triggered, it would cause system panic when try to access the
> >>> action member.
> >>
> >> And why would that interrupt be enabled? If you enable a PPI before
> >> registering a handler, you're doing something wrong.
> >
> > Actually,the problem described above happened during the capture
> > kernel booting.
> >
> > In my system, sometimes there is a pending physical timer
> > interrupt(30) when the first kernel panic and the status is kept
> > until the capture kernel booting.
>
> And that's perfectly fine. The interrupt can be pending forever, as it
> shouldn't get enabled.
>
> > So, this interrupt will be handled during capture kernel booting.
>
> Why? Who enables it?
>
> > Becasue we use virt timer interrupt but not physical timer interrupt
> > in capture kernel, the interrupt 30 has no action handler.
>
> Again: who enables this interrupt? Whichever driver enables it should be
> fixed.
I'm also at a loss.
In this case, arch_timer_uses_ppi must be VIRT_PPI. So in
arch_timer_register(), we'll only request_percpu_irq the virt PPI.
arch_timer_has_nonsecure_ppi() will be false, given arch_timer_uses_ppi
is VIRT_PPI, so in arch_timer_starting_cpu() we'll only
enable_percpu_irq() the virt PPI.
We don't fiddle with arch_timer_uses_ppi after calling
arch_timer_register(). So I can't see how we could enable another IRQ in
this case.
Looking at the driver in virt/kvm/arm/arch_timer.c, we only enable what
we've succesfully requested, so it doesnt' seem like there's an issue
there.
>From a quick look at teh GIC driver, it looks like we reset PPIs
correctly, so it doesn't look like we have a "latent enable".
Thanks,
Mark.
next prev parent reply other threads:[~2016-08-30 11:21 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-30 4:17 [PATCH] generic: Add the exception case checking routine for ppi interrupt MaJun
2016-08-30 8:50 ` Marc Zyngier
2016-08-30 10:35 ` majun (F)
2016-08-30 11:07 ` Marc Zyngier
2016-08-30 11:21 ` Mark Rutland [this message]
2016-08-31 6:35 ` majun (F)
2016-08-31 8:35 ` Marc Zyngier
2016-09-01 8:15 ` majun (F)
2016-09-01 9:03 ` Marc Zyngier
2016-09-02 13:08 ` Thomas Gleixner
2016-09-02 15:49 ` Marc Zyngier
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