From: lorenzo.pieralisi@arm.com (Lorenzo Pieralisi)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 06/22] ARM: implement ioremap_nopost() interface
Date: Wed, 5 Apr 2017 11:21:27 +0100 [thread overview]
Message-ID: <20170405102127.GA15147@red-moon> (raw)
In-Reply-To: <20170331110813.GA31763@red-moon>
On Fri, Mar 31, 2017 at 12:08:13PM +0100, Lorenzo Pieralisi wrote:
> Hi Russell,
>
> On Mon, Mar 27, 2017 at 10:49:34AM +0100, Lorenzo Pieralisi wrote:
> > The PCI bus specifications (rev 3.0, 3.2.5 "Transaction Ordering
> > and Posting") define rules for PCI configuration space transactions
> > ordering and posting, that state that configuration writes have to
> > be non-posted transactions.
> >
> > Current ioremap interface on ARM provides mapping functions that
> > provide "bufferable" writes transactions (ie ioremap uses MT_DEVICE
> > memory type) aka posted writes, so PCI host controller drivers have
> > no arch interface to remap PCI configuration space with memory
> > attributes that comply with the PCI specifications for configuration
> > space.
> >
> > Implement an ARM specific ioremap_nopost() interface that allows to
> > map PCI config memory regions with MT_UNCACHED memory type (ie strongly
> > ordered - non-posted writes), providing a remap function that complies
> > with PCI specifications for config space transactions.
> >
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Arnd Bergmann <arnd@arndb.de>
> > Cc: Russell King <linux@armlinux.org.uk>
> > ---
> > arch/arm/include/asm/io.h | 10 ++++++++++
> > arch/arm/mm/ioremap.c | 7 +++++++
> > arch/arm/mm/nommu.c | 9 +++++++++
> > 3 files changed, 26 insertions(+)
>
> I have not added your ACK to this patch since I slightly tweaked
> it to adapt it to ioremap_nopost() interface instead of a PCI
> specific one. Furthermore, I mechanically added a ioremap_nopost()
> version for nommu too in the process, would be good to have a look
> if I did that properly please.
>
> Can I add your ACK on this patch ? If you spot any issues please
> do let me know.
Hi Russell,
please let me know if your ACK on this patch stands as I have to respin
it shortly for hopefully final round of review.
Thanks !
Lorenzo
> Thank you !
> Lorenzo
>
> > diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
> > index 42871fb..49913d1 100644
> > --- a/arch/arm/include/asm/io.h
> > +++ b/arch/arm/include/asm/io.h
> > @@ -352,6 +352,7 @@ static inline void memcpy_toio(volatile void __iomem *to, const void *from,
> > * mapping has specific properties.
> > *
> > * Function Memory type Cacheability Cache hint
> > + * ioremap_nopost() SO n/a n/a
> > * ioremap() Device n/a n/a
> > * ioremap_nocache() Device n/a n/a
> > * ioremap_cache() Normal Writeback Read allocate
> > @@ -372,6 +373,12 @@ static inline void memcpy_toio(volatile void __iomem *to, const void *from,
> > * compiler may generate unaligned accesses - eg, via inlining its own
> > * memcpy.
> > *
> > + * ioremap_nopost() maps memory as strongly ordered, to be used for
> > + * specific mappings (eg PCI config space) that require non-posted
> > + * write transactions. Strongly ordered transactions are ordered wrt
> > + * device mappings, which means that ioremap_nopost() is the same
> > + * as ioremap() except for non-posted writes behaviour.
> > + *
> > * All normal memory mappings have the following properties:
> > * - reads can be repeated with no side effects
> > * - repeated reads return the last value written
> > @@ -407,6 +414,9 @@ void __iomem *ioremap_wc(resource_size_t res_cookie, size_t size);
> > #define ioremap_wc ioremap_wc
> > #define ioremap_wt ioremap_wc
> >
> > +void __iomem *ioremap_nopost(resource_size_t res_cookie, size_t size);
> > +#define ioremap_nopost ioremap_nopost
> > +
> > void iounmap(volatile void __iomem *iomem_cookie);
> > #define iounmap iounmap
> >
> > diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
> > index ff0eed2..4ffaf16 100644
> > --- a/arch/arm/mm/ioremap.c
> > +++ b/arch/arm/mm/ioremap.c
> > @@ -463,6 +463,13 @@ void iounmap(volatile void __iomem *cookie)
> > }
> > EXPORT_SYMBOL(iounmap);
> >
> > +void __iomem *ioremap_nopost(resource_size_t res_cookie, size_t size)
> > +{
> > + return arch_ioremap_caller(res_cookie, size, MT_UNCACHED,
> > + __builtin_return_address(0));
> > +}
> > +EXPORT_SYMBOL_GPL(ioremap_nopost);
> > +
> > #ifdef CONFIG_PCI
> > static int pci_ioremap_mem_type = MT_DEVICE;
> >
> > diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
> > index 3b5c7aa..dfd736a 100644
> > --- a/arch/arm/mm/nommu.c
> > +++ b/arch/arm/mm/nommu.c
> > @@ -21,6 +21,8 @@
> > #include <asm/mpu.h>
> > #include <asm/procinfo.h>
> >
> > +#include <asm/mach/map.h>
> > +
> > #include "mm.h"
> >
> > unsigned long vectors_base;
> > @@ -433,6 +435,13 @@ void __iomem *ioremap_wc(resource_size_t res_cookie, size_t size)
> > }
> > EXPORT_SYMBOL(ioremap_wc);
> >
> > +void __iomem *ioremap_nopost(resource_size_t res_cookie, size_t size)
> > +{
> > + return __arm_ioremap_caller(res_cookie, size, MT_UNCACHED,
> > + __builtin_return_address(0));
> > +}
> > +EXPORT_SYMBOL(ioremap_nopost);
> > +
> > void *arch_memremap_wb(phys_addr_t phys_addr, size_t size)
> > {
> > return (void *)phys_addr;
> > --
> > 2.10.0
> >
next prev parent reply other threads:[~2017-04-05 10:21 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-27 9:49 [PATCH v2 00/22] PCI: fix config and I/O Address space memory mappings Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 01/22] PCI: remove __weak tag from pci_remap_iospace() Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 02/22] asm-generic/io.h: add ioremap_nopost remap interface Lorenzo Pieralisi
2017-03-28 1:41 ` Bjorn Helgaas
2017-03-28 14:45 ` Lorenzo Pieralisi
2017-03-30 16:47 ` Bjorn Helgaas
2017-04-05 10:58 ` Russell King - ARM Linux
2017-04-05 12:38 ` Lorenzo Pieralisi
2017-04-06 10:26 ` Lorenzo Pieralisi
2017-04-06 10:47 ` Russell King - ARM Linux
2017-04-10 14:30 ` Lorenzo Pieralisi
2017-04-06 10:53 ` Luis R. Rodriguez
2017-04-06 11:38 ` Lorenzo Pieralisi
2017-04-06 11:59 ` Luis R. Rodriguez
2017-04-06 13:07 ` Russell King - ARM Linux
2017-04-06 16:21 ` Lorenzo Pieralisi
2017-04-06 16:40 ` Russell King - ARM Linux
2017-04-06 17:09 ` Lorenzo Pieralisi
2017-04-06 17:19 ` Russell King - ARM Linux
2017-04-06 12:11 ` Russell King - ARM Linux
2017-04-06 12:25 ` Luis R. Rodriguez
2017-03-27 9:49 ` [PATCH v2 03/22] asm-generic/pgtable.h: introduce pgprot_nonposted remap attribute Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 04/22] PCI: fix pci_remap_iospace() " Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 05/22] ARM64: implement ioremap_nopost() interface Lorenzo Pieralisi
2017-03-30 16:19 ` Will Deacon
2017-03-27 9:49 ` [PATCH v2 06/22] ARM: " Lorenzo Pieralisi
2017-03-31 11:08 ` Lorenzo Pieralisi
2017-04-05 10:21 ` Lorenzo Pieralisi [this message]
2017-03-27 9:49 ` [PATCH v2 07/22] PCI: ECAM: use ioremap_nopost() to map config region Lorenzo Pieralisi
2017-03-30 16:20 ` Will Deacon
2017-03-27 9:49 ` [PATCH v2 08/22] lib: implement Devres ioremap_nopost() interface Lorenzo Pieralisi
2017-03-28 1:41 ` Bjorn Helgaas
2017-03-28 14:50 ` Lorenzo Pieralisi
2017-03-28 15:55 ` Tejun Heo
2017-03-27 9:49 ` [PATCH v2 09/22] PCI: xilinx: update PCI config space remap function Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 10/22] PCI: xilinx-nwl: " Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 11/22] PCI: spear13xx: " Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 12/22] PCI: rockchip: " Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 13/22] PCI: qcom: " Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 14/22] PCI: iproc-platform: " Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 15/22] PCI: hisi: " Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 16/22] PCI: designware: " Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 17/22] PCI: armada8k: " Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 18/22] PCI: xgene: " Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 19/22] PCI: tegra: " Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 20/22] PCI: layerscape: " Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 21/22] PCI: keystone-dw: " Lorenzo Pieralisi
2017-03-27 9:49 ` [PATCH v2 22/22] PCI: versatile: " Lorenzo Pieralisi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170405102127.GA15147@red-moon \
--to=lorenzo.pieralisi@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).