From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/2] GICv3 world-switch fixes for -next
Date: Mon, 10 Apr 2017 10:19:42 +0100 [thread overview]
Message-ID: <20170410091944.19963-1-marc.zyngier@arm.com> (raw)
Here's a couple of fixes for issues I've spotted when running our
current -next branch on a GICv3 system.
The first patch fixes our v2-on-v3 handling of VMCR_EL2, which cannot
be safely save/restored when ICC_SRE_EL1.SRE is set (in that case,
VMCR_EL2.VFIQen is RES1, and Group0 interrupts get delivered as
FIQ). This is effectively de-optimizing VMCR_EL2 save/restore for
v2-on-v3, which is a pretty rare use case.
The second patch fixes a typo that leads to a HYP panic when the CPU
accesses an unimplemented list register, or the corruption of some
memory if all 16 architectural list registers are used.
Both patches tested on -rc6 + kvmarm/next on a rk3399 platform.
Marc Zyngier (2):
KVM: arm/arm64: vgic-v3: De-optimize VMCR save/restore when emulating
a GICv2
KVM: arm/arm64: vgic-v3: Fix off-by-one LR access
virt/kvm/arm/hyp/vgic-v3-sr.c | 10 +++++++---
virt/kvm/arm/vgic/vgic.c | 26 ++++++++++++++++++++------
2 files changed, 27 insertions(+), 9 deletions(-)
--
2.11.0
next reply other threads:[~2017-04-10 9:19 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-10 9:19 Marc Zyngier [this message]
2017-04-10 9:19 ` [PATCH 1/2] KVM: arm/arm64: vgic-v3: De-optimize VMCR save/restore when emulating a GICv2 Marc Zyngier
2017-04-19 10:08 ` Christoffer Dall
2017-04-19 10:31 ` Marc Zyngier
2017-04-10 9:19 ` [PATCH 2/2] KVM: arm/arm64: vgic-v3: Fix off-by-one LR access Marc Zyngier
2017-04-19 10:09 ` Christoffer Dall
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