* [PATCH 0/3] arm64: dts: sdm845: Add RPMh-regulators and usb
@ 2018-07-10 22:01 Douglas Anderson
2018-07-10 22:02 ` [PATCH 1/3] arm64: dts: qcom: sdm845: Add USB-related nodes Douglas Anderson
` (2 more replies)
0 siblings, 3 replies; 12+ messages in thread
From: Douglas Anderson @ 2018-07-10 22:01 UTC (permalink / raw)
To: linux-arm-kernel
This series adds device tree nodes for the RPMh regulators and USB. These
patches are based on patches in various downstream kernels from Manu Gautam
and David Collins.
This series was tested on SDM845-MTP (with no-AC firmware) atop Andy Gross's
current "for-next" branch with some patches picked from list:
1. clk: qcom: clk-rpmh: Add QCOM RPMh clock driver
https://patchwork.kernel.org/patch/10388151/
2. regulator: add QCOM RPMh regulator driver
https://patchwork.kernel.org/patch/10483369/
3. nvmem: Don't let a NULL cell_id for nvmem_cell_get() crash us
https://patchwork.kernel.org/patch/10401993/
I also needed a few patches that haven't yet posted to-list to keep things
from crashing at boot (these patches weren't needed when using Coreboot as
the BIOS):
1. arm64: dts: sdm845: Enable smmu support
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/8046f638b4
2. HACK: iommu/arm-smmu: make a mismatch in CBs and CB interrupts non-fatal
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/8c0b634f48
Given the above caveats these three patches are probably not quite ready for
landing, but I wanted to at least get them out there to start the review
process.
Douglas Anderson (2):
arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators
arm64: dts: qcom: sdm845-mtp: Add nodes for USB
Manu Gautam (1):
arm64: dts: qcom: sdm845: Add USB-related nodes
arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 507 ++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sdm845.dtsi | 189 +++++++++
2 files changed, 696 insertions(+)
--
2.18.0.203.gfac676dfb9-goog
^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH 1/3] arm64: dts: qcom: sdm845: Add USB-related nodes 2018-07-10 22:01 [PATCH 0/3] arm64: dts: sdm845: Add RPMh-regulators and usb Douglas Anderson @ 2018-07-10 22:02 ` Douglas Anderson 2018-07-12 16:56 ` Doug Anderson 2018-07-10 22:02 ` [PATCH 2/3] arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators Douglas Anderson 2018-07-10 22:02 ` [PATCH 3/3] arm64: dts: qcom: sdm845-mtp: Add nodes for USB Douglas Anderson 2 siblings, 1 reply; 12+ messages in thread From: Douglas Anderson @ 2018-07-10 22:02 UTC (permalink / raw) To: linux-arm-kernel From: Manu Gautam <mgautam@codeaurora.org> This adds nodes for USB and related PHYs. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> [dianders: reworked quite a bit] Signed-off-by: Douglas Anderson <dianders@chromium.org> --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 189 +++++++++++++++++++++++++++ 1 file changed, 189 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 15188d34a2ab..1de59a39f4fa 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/clock/qcom,gcc-sdm845.h> #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qusb2.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> / { @@ -249,6 +250,18 @@ #power-domain-cells = <1>; }; + qfprom at 780000 { + compatible = "qcom,qfprom"; + reg = <0x780000 0x8ff>; + #address-cells = <1>; + #size-cells = <1>; + + qusb2p_hstx_trim: hstx-trim at 1eb { + reg = <0x1eb 0x1>; + bits = <1 4>; + }; + }; + qupv3_id_0: geniqup at 8c0000 { compatible = "qcom,geni-se-qup"; reg = <0x8c0000 0x6000>; @@ -961,6 +974,182 @@ }; }; + usb_1_hsphy: phy at 88e2000 { + compatible = "qcom,sdm845-qusb2-phy"; + reg = <0x88e2000 0x400>; + status = "disabled"; + #phy-cells = <0>; + + clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "cfg_ahb", "ref"; + + resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; + + nvmem-cells = <&qusb2p_hstx_trim>; + }; + + usb_2_hsphy: phy at 88e3000 { + compatible = "qcom,sdm845-qusb2-phy"; + reg = <0x88e3000 0x400>; + status = "disabled"; + #phy-cells = <0>; + + clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "cfg_ahb", "ref"; + + resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; + }; + + usb_1_qmpphy: phy at 88e9000 { + compatible = "qcom,sdm845-qmp-usb3-phy"; + reg = <0x88e9000 0x18c>, + <0x88e8000 0x10>; + reg-names = "reg-base", "dp_com"; + status = "disabled"; + #clock-cells = <1>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, + <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&gcc GCC_USB3_PRIM_CLKREF_CLK>, + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; + clock-names = "aux", "cfg_ahb", "ref", "com_aux"; + + resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, + <&gcc GCC_USB3_PHY_PRIM_BCR>; + reset-names = "phy", "common"; + + usb_1_ssphy: lane at 88e9200 { + reg = <0x88e9200 0x128>, + <0x88e9400 0x200>, + <0x88e9c00 0x218>, + <0x88e9a00 0x100>; + #phy-cells = <0>; + clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "pipe0"; + clock-output-names = "usb3_phy_pipe_clk_src"; + }; + }; + + usb_2_qmpphy: phy at 88eb000 { + compatible = "qcom,sdm845-qmp-usb3-uni-phy"; + reg = <0x88eb000 0x18c>; + status = "disabled"; + #clock-cells = <1>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, + <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&gcc GCC_USB3_SEC_CLKREF_CLK>, + <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; + clock-names = "aux", "cfg_ahb", "ref", "com_aux"; + + resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, + <&gcc GCC_USB3_PHY_SEC_BCR>; + reset-names = "phy", "common"; + + usb_2_ssphy: lane at 88eb200 { + reg = <0x88eb200 0x128>, + <0x88eb400 0x1fc>, + <0x88eb800 0x218>, + <0x88e9600 0x70>; + #phy-cells = <0>; + clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; + clock-names = "pipe0"; + clock-output-names = "usb3_uni_phy_pipe_clk_src"; + }; + }; + + usb_1: usb at a6f8800 { + compatible = "qcom,sdm845-dwc3", "qcom,dwc3"; + reg = <0xa6f8800 0x400>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_PRIM_SLEEP_CLK>; + clock-names = "cfg_noc", "core", "iface", "mock_utmi", + "sleep"; + + assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>; + assigned-clock-rates = <19200000>, <150000000>; + + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hs_phy_irq", "ss_phy_irq", + "dm_hs_phy_irq", "dp_hs_phy_irq"; + + power-domains = <&gcc USB30_PRIM_GDSC>; + + resets = <&gcc GCC_USB30_PRIM_BCR>; + + usb_1_dwc3: dwc3 at a600000 { + compatible = "snps,dwc3"; + reg = <0xa600000 0xcd00>; + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + + usb_2: usb at a8f8800 { + compatible = "qcom,sdm845-dwc3", "qcom,dwc3"; + reg = <0xa8f8800 0x400>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, + <&gcc GCC_USB30_SEC_MASTER_CLK>, + <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, + <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_SEC_SLEEP_CLK>; + clock-names = "cfg_noc", "core", "iface", "mock_utmi", + "sleep"; + + assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_SEC_MASTER_CLK>; + assigned-clock-rates = <19200000>, <150000000>; + + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hs_phy_irq", "ss_phy_irq", + "dm_hs_phy_irq", "dp_hs_phy_irq"; + + power-domains = <&gcc USB30_SEC_GDSC>; + + resets = <&gcc GCC_USB30_SEC_BCR>; + + usb_2_dwc3: dwc3 at a800000 { + compatible = "snps,dwc3"; + reg = <0xa800000 0xcd00>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_2_hsphy>, <&usb_2_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + spmi_bus: spmi at c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0xc440000 0x1100>, -- 2.18.0.203.gfac676dfb9-goog ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 1/3] arm64: dts: qcom: sdm845: Add USB-related nodes 2018-07-10 22:02 ` [PATCH 1/3] arm64: dts: qcom: sdm845: Add USB-related nodes Douglas Anderson @ 2018-07-12 16:56 ` Doug Anderson 0 siblings, 0 replies; 12+ messages in thread From: Doug Anderson @ 2018-07-12 16:56 UTC (permalink / raw) To: linux-arm-kernel Hi, On Tue, Jul 10, 2018 at 3:02 PM, Douglas Anderson <dianders@chromium.org> wrote: > From: Manu Gautam <mgautam@codeaurora.org> > > This adds nodes for USB and related PHYs. > > Signed-off-by: Manu Gautam <mgautam@codeaurora.org> > [dianders: reworked quite a bit] > Signed-off-by: Douglas Anderson <dianders@chromium.org> > --- > > arch/arm64/boot/dts/qcom/sdm845.dtsi | 189 +++++++++++++++++++++++++++ > 1 file changed, 189 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index 15188d34a2ab..1de59a39f4fa 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -8,6 +8,7 @@ > #include <dt-bindings/clock/qcom,gcc-sdm845.h> > #include <dt-bindings/clock/qcom,rpmh.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > +#include <dt-bindings/phy/phy-qcom-qusb2.h> > #include <dt-bindings/soc/qcom,rpmh-rsc.h> > > / { > @@ -249,6 +250,18 @@ > #power-domain-cells = <1>; > }; > > + qfprom at 780000 { > + compatible = "qcom,qfprom"; > + reg = <0x780000 0x8ff>; I have later found that this should point to the "corrected" address range, not the raw one. Thus address should be 0x784000. ...still trying to get more details on the exact right length. > + #address-cells = <1>; > + #size-cells = <1>; > + > + qusb2p_hstx_trim: hstx-trim at 1eb { > + reg = <0x1eb 0x1>; > + bits = <1 4>; > + }; I've now found out the trim location for the secondary port. Thus on my next revision I'll add: qusb2s_hstx_trim: hstx-trim-secondary at 1eb { reg = <0x1eb 0x2>; bits = <6 4>; }; Since this series isn't really ready for merging yet (see the cover letter), I'll sit on these changes for now but I'll include them in the next spin. -Doug ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/3] arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators 2018-07-10 22:01 [PATCH 0/3] arm64: dts: sdm845: Add RPMh-regulators and usb Douglas Anderson 2018-07-10 22:02 ` [PATCH 1/3] arm64: dts: qcom: sdm845: Add USB-related nodes Douglas Anderson @ 2018-07-10 22:02 ` Douglas Anderson 2018-07-10 22:32 ` David Collins 2018-07-11 2:57 ` kbuild test robot 2018-07-10 22:02 ` [PATCH 3/3] arm64: dts: qcom: sdm845-mtp: Add nodes for USB Douglas Anderson 2 siblings, 2 replies; 12+ messages in thread From: Douglas Anderson @ 2018-07-10 22:02 UTC (permalink / raw) To: linux-arm-kernel Add regulator devices for PMIC regulators managed via VRM and XOB RPMh accelerators. A few notes here: - Regulators are added directly to the board file. While it's true that this will mean a bunch of copy/pasting for other boards that are very similar to MTP, this is probably the right call since boards could make changes to the way these regulators are hooked up and trying to find a way to avoid duplication will result in some confusing node overrides. - Regulators are always given labels based on the schematic. If there is more than one logical name on the schematic for the same rail the all of these secondary names are also listed and should be referred to as appropriate. - Regulators all default to HPM mode with the assumption that if a rail is being provided to a driver that doesn't specify the needed current that we'll at least be correct. NOTE: This patch is loosely based on one originally shared to me by David Collins. Signed-off-by: Douglas Anderson <dianders@chromium.org> --- arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 446 ++++++++++++++++++++++++ 1 file changed, 446 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts index 6d651f314193..1db4b9735e70 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts @@ -7,6 +7,7 @@ /dts-v1/; +#include <dt-bindings/regulator/qcom,rpmh-regulator.h> #include "sdm845.dtsi" / { @@ -20,6 +21,451 @@ chosen { stdout-path = "serial0:115200n8"; }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + }; + + /* + * Apparently RPMh does not provide support for PM8998 S4 because it + * is always-on; model it as a fixed regulator. + */ + vreg_s4a_1p8: pm8998-smps4 { + compatible = "regulator-fixed"; + regulator-name = "vreg_s4a_1p8"; + + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-always-on; + regulator-boot-on; + }; +}; + +&apps_rsc { + pm8998-rpmh-regulators { + compatible = "qcom,pm8998-rpmh-regulators"; + qcom,pmic-id = "a"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s6-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s8-supply = <&vph_pwr>; + vdd-s9-supply = <&vph_pwr>; + vdd-s10-supply = <&vph_pwr>; + vdd-s11-supply = <&vph_pwr>; + vdd-s12-supply = <&vph_pwr>; + vdd-s13-supply = <&vph_pwr>; + vdd-l1-l27-supply = <&vreg_s7a_1p025>; + vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; + vdd-l3-l11-supply = <&vreg_s7a_1p025>; + vdd-l4-l5-supply = <&vreg_s7a_1p025>; + vdd-l6-supply = <&vph_pwr>; + vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; + vdd-l9-supply = <&vreg_bob>; + vdd-l10-l23-l25-supply = <&vreg_bob>; + vdd-l13-l19-l21-supply = <&vreg_bob>; + vdd-l16-l28-supply = <&vreg_bob>; + vdd-l18-l22-supply = <&vreg_bob>; + vdd-l20-l24-supply = <&vreg_bob>; + vdd-l26-supply = <&vreg_s3a_1p35>; + vin-lvs-1-2-supply = <&vreg_s4a_1p8>; + + vreg_s2a_1p125: smps2 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + }; + + vreg_s3a_1p35: smps3 { + regulator-min-microvolt = <1352000>; + regulator-max-microvolt = <1352000>; + }; + + vreg_s5a_2p04: smps5 { + regulator-min-microvolt = <1904000>; + regulator-max-microvolt = <2040000>; + }; + + vreg_s7a_1p025: smps7 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1028000>; + }; + + vdd_qusb_hs0: + vdda_hp_pcie_core: + vdda_mipi_csi0_0p9: + vdda_mipi_csi1_0p9: + vdda_mipi_csi2_0p9: + vdda_mipi_dsi0_pll: + vdda_mipi_dsi1_pll: + vdda_qlink_lv: + vdda_qlink_lv_ck: + vdda_qrefs_0p875: + vdda_pcie_core: + vdda_pll_cc_ebi01: + vdda_pll_cc_ebi23: + vdda_sp_sensor: + vdda_ufs1_core: + vdda_ufs2_core: + vdda_usb1_ss_core: + vdda_usb2_ss_core: + vreg_l1a_0p875: ldo1 { + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vddpx_10: + vreg_l2a_1p2: ldo2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + regulator-always-on; + }; + + vreg_l3a_1p0: ldo3 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l5a_0p8: ldo5 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l6a_1p8: ldo6 { + regulator-min-microvolt = <1856000>; + regulator-max-microvolt = <1856000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l7a_1p8: ldo7 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l8a_1p2: ldo8 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1248000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l9a_1p8: ldo9 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l10a_1p8: ldo10 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l11a_1p0: ldo11 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1048000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vdd_qfprom: + vdd_qfprom_sp: + vdda_apc1_cs_1p8: + vdda_gfx_cs_1p8: + vdda_qrefs_1p8: + vdda_qusb_hs0_1p8: + vddpx_11: + vreg_l12a_1p8: ldo12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vddpx_2: + vreg_l13a_2p95: ldo13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l14a_1p88: ldo14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1880000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + regulator-always-on; + }; + + vreg_l15a_1p8: ldo15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l16a_2p7: ldo16 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2704000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l17a_1p3: ldo17 { + regulator-min-microvolt = <1304000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l18a_2p7: ldo18 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l19a_3p0: ldo19 { + regulator-min-microvolt = <2856000>; + regulator-max-microvolt = <3104000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l20a_2p95: ldo20 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l21a_2p95: ldo21 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l22a_2p85: ldo22 { + regulator-min-microvolt = <2864000>; + regulator-max-microvolt = <3312000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l23a_3p3: ldo23 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3312000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vdda_qusb_hs0_3p1: + vreg_l24a_3p075: ldo24 { + regulator-min-microvolt = <3088000>; + regulator-max-microvolt = <3088000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l25a_3p3: ldo25 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3312000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vdda_hp_pcie_1p2: + vdda_hv_ebi0: + vdda_hv_ebi1: + vdda_hv_ebi2: + vdda_hv_ebi3: + vdda_mipi_csi_1p25: + vdda_mipi_dsi0_1p2: + vdda_mipi_dsi1_1p2: + vdda_pcie_1p2: + vdda_ufs1_1p2: + vdda_ufs2_1p2: + vdda_usb1_ss_1p2: + vdda_usb2_ss_1p2: + vreg_l26a_1p2: ldo26 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l28a_3p0: ldo28 { + regulator-min-microvolt = <2856000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = + <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = + <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_lvs1a_1p8: lvs1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vreg_lvs2a_1p8: lvs2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + }; + + pmi8998-rpmh-regulators { + compatible = "qcom,pmi8998-rpmh-regulators"; + qcom,pmic-id = "b"; + + vdd-bob-supply = <&vph_pwr>; + + vreg_bob: bob { + regulator-min-microvolt = <3312000>; + regulator-max-microvolt = <3600000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; + regulator-allow-bypass; + }; + }; + + pm8005-rpmh-regulators { + compatible = "qcom,pm8005-rpmh-regulators"; + qcom,pmic-id = "c"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + + vreg_s3c_0p6: smps3 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <600000>; + }; + }; }; &i2c10 { -- 2.18.0.203.gfac676dfb9-goog ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/3] arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators 2018-07-10 22:02 ` [PATCH 2/3] arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators Douglas Anderson @ 2018-07-10 22:32 ` David Collins 2018-07-10 22:55 ` Doug Anderson 2018-07-11 2:57 ` kbuild test robot 1 sibling, 1 reply; 12+ messages in thread From: David Collins @ 2018-07-10 22:32 UTC (permalink / raw) To: linux-arm-kernel Hello Doug, On 07/10/2018 03:02 PM, Douglas Anderson wrote: ... > + vdd-s1-supply = <&vph_pwr>; > + vdd-s2-supply = <&vph_pwr>; > + vdd-s3-supply = <&vph_pwr>; > + vdd-s4-supply = <&vph_pwr>; > + vdd-s5-supply = <&vph_pwr>; > + vdd-s6-supply = <&vph_pwr>; > + vdd-s7-supply = <&vph_pwr>; > + vdd-s8-supply = <&vph_pwr>; > + vdd-s9-supply = <&vph_pwr>; > + vdd-s10-supply = <&vph_pwr>; > + vdd-s11-supply = <&vph_pwr>; > + vdd-s12-supply = <&vph_pwr>; > + vdd-s13-supply = <&vph_pwr>; > + vdd-l1-l27-supply = <&vreg_s7a_1p025>; > + vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; > + vdd-l3-l11-supply = <&vreg_s7a_1p025>; > + vdd-l4-l5-supply = <&vreg_s7a_1p025>; > + vdd-l6-supply = <&vph_pwr>; > + vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; > + vdd-l9-supply = <&vreg_bob>; > + vdd-l10-l23-l25-supply = <&vreg_bob>; > + vdd-l13-l19-l21-supply = <&vreg_bob>; > + vdd-l16-l28-supply = <&vreg_bob>; > + vdd-l18-l22-supply = <&vreg_bob>; > + vdd-l20-l24-supply = <&vreg_bob>; > + vdd-l26-supply = <&vreg_s3a_1p35>; > + vin-lvs-1-2-supply = <&vreg_s4a_1p8>; I would suggest not specifying any of these regulator parent supplies in device tree. RPMh will be enforcing all regulator parent-child dependencies. Therefore, handling the dependencies in Linux is redundant. It will result in additional RPMh requests as well as more time spent in regulator framework calls. Overall, it will lead to slightly lower performance. Note that while specifying the parent supplies results in less efficient runtime behavior, it is not technically wrong so you could keep them in place if you prefer. Take care, David ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/3] arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators 2018-07-10 22:32 ` David Collins @ 2018-07-10 22:55 ` Doug Anderson 2018-07-10 23:01 ` David Collins 0 siblings, 1 reply; 12+ messages in thread From: Doug Anderson @ 2018-07-10 22:55 UTC (permalink / raw) To: linux-arm-kernel Hi On Tue, Jul 10, 2018 at 3:32 PM, David Collins <collinsd@codeaurora.org> wrote: > Hello Doug, > > On 07/10/2018 03:02 PM, Douglas Anderson wrote: > ... >> + vdd-s1-supply = <&vph_pwr>; >> + vdd-s2-supply = <&vph_pwr>; >> + vdd-s3-supply = <&vph_pwr>; >> + vdd-s4-supply = <&vph_pwr>; >> + vdd-s5-supply = <&vph_pwr>; >> + vdd-s6-supply = <&vph_pwr>; >> + vdd-s7-supply = <&vph_pwr>; >> + vdd-s8-supply = <&vph_pwr>; >> + vdd-s9-supply = <&vph_pwr>; >> + vdd-s10-supply = <&vph_pwr>; >> + vdd-s11-supply = <&vph_pwr>; >> + vdd-s12-supply = <&vph_pwr>; >> + vdd-s13-supply = <&vph_pwr>; >> + vdd-l1-l27-supply = <&vreg_s7a_1p025>; >> + vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; >> + vdd-l3-l11-supply = <&vreg_s7a_1p025>; >> + vdd-l4-l5-supply = <&vreg_s7a_1p025>; >> + vdd-l6-supply = <&vph_pwr>; >> + vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; >> + vdd-l9-supply = <&vreg_bob>; >> + vdd-l10-l23-l25-supply = <&vreg_bob>; >> + vdd-l13-l19-l21-supply = <&vreg_bob>; >> + vdd-l16-l28-supply = <&vreg_bob>; >> + vdd-l18-l22-supply = <&vreg_bob>; >> + vdd-l20-l24-supply = <&vreg_bob>; >> + vdd-l26-supply = <&vreg_s3a_1p35>; >> + vin-lvs-1-2-supply = <&vreg_s4a_1p8>; > > I would suggest not specifying any of these regulator parent supplies in > device tree. RPMh will be enforcing all regulator parent-child > dependencies. Therefore, handling the dependencies in Linux is redundant. > It will result in additional RPMh requests as well as more time spent in > regulator framework calls. Overall, it will lead to slightly lower > performance. Note that while specifying the parent supplies results in > less efficient runtime behavior, it is not technically wrong so you could > keep them in place if you prefer. Interesting. ...so RPMh will automatically turn on parent regulators when their children are enabled (assuming that the parent regulator is also RPMh controlled)? Personally I'd still prefer to see Linux managing its own state and relying less on RPMh-automatic stuff, but I'd defer to Bjorn / Andy (or others) to override me. -Doug ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/3] arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators 2018-07-10 22:55 ` Doug Anderson @ 2018-07-10 23:01 ` David Collins 0 siblings, 0 replies; 12+ messages in thread From: David Collins @ 2018-07-10 23:01 UTC (permalink / raw) To: linux-arm-kernel Hi, On 07/10/2018 03:55 PM, Doug Anderson wrote: > On Tue, Jul 10, 2018 at 3:32 PM, David Collins <collinsd@codeaurora.org> wrote: >> On 07/10/2018 03:02 PM, Douglas Anderson wrote: >> ... >>> + vdd-s1-supply = <&vph_pwr>; >>> + vdd-s2-supply = <&vph_pwr>; >>> + vdd-s3-supply = <&vph_pwr>; >>> + vdd-s4-supply = <&vph_pwr>; >>> + vdd-s5-supply = <&vph_pwr>; >>> + vdd-s6-supply = <&vph_pwr>; >>> + vdd-s7-supply = <&vph_pwr>; >>> + vdd-s8-supply = <&vph_pwr>; >>> + vdd-s9-supply = <&vph_pwr>; >>> + vdd-s10-supply = <&vph_pwr>; >>> + vdd-s11-supply = <&vph_pwr>; >>> + vdd-s12-supply = <&vph_pwr>; >>> + vdd-s13-supply = <&vph_pwr>; >>> + vdd-l1-l27-supply = <&vreg_s7a_1p025>; >>> + vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; >>> + vdd-l3-l11-supply = <&vreg_s7a_1p025>; >>> + vdd-l4-l5-supply = <&vreg_s7a_1p025>; >>> + vdd-l6-supply = <&vph_pwr>; >>> + vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; >>> + vdd-l9-supply = <&vreg_bob>; >>> + vdd-l10-l23-l25-supply = <&vreg_bob>; >>> + vdd-l13-l19-l21-supply = <&vreg_bob>; >>> + vdd-l16-l28-supply = <&vreg_bob>; >>> + vdd-l18-l22-supply = <&vreg_bob>; >>> + vdd-l20-l24-supply = <&vreg_bob>; >>> + vdd-l26-supply = <&vreg_s3a_1p35>; >>> + vin-lvs-1-2-supply = <&vreg_s4a_1p8>; >> >> I would suggest not specifying any of these regulator parent supplies in >> device tree. RPMh will be enforcing all regulator parent-child >> dependencies. Therefore, handling the dependencies in Linux is redundant. >> It will result in additional RPMh requests as well as more time spent in >> regulator framework calls. Overall, it will lead to slightly lower >> performance. Note that while specifying the parent supplies results in >> less efficient runtime behavior, it is not technically wrong so you could >> keep them in place if you prefer. > > Interesting. ...so RPMh will automatically turn on parent regulators > when their children are enabled (assuming that the parent regulator is > also RPMh controlled)? Yes, exactly. RPMh also ensures that the voltage of a parent regulator is sufficient to meet minimum headroom voltage requirements of all subregulated child regulators. > Personally I'd still prefer to see Linux managing its own state and > relying less on RPMh-automatic stuff, but I'd defer to Bjorn / Andy > (or others) to override me. Ok Take care, David -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/3] arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators 2018-07-10 22:02 ` [PATCH 2/3] arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators Douglas Anderson 2018-07-10 22:32 ` David Collins @ 2018-07-11 2:57 ` kbuild test robot 1 sibling, 0 replies; 12+ messages in thread From: kbuild test robot @ 2018-07-11 2:57 UTC (permalink / raw) To: linux-arm-kernel Hi Douglas, Thank you for the patch! Yet something to improve: [auto build test ERROR on agross/for-next] [also build test ERROR on next-20180710] [cannot apply to v4.18-rc4] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Douglas-Anderson/arm64-dts-sdm845-Add-RPMh-regulators-and-usb/20180711-061052 base: https://git.kernel.org/pub/scm/linux/kernel/git/agross/linux.git for-next config: arm64-allyesconfig (attached as .config) compiler: aarch64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree GCC_VERSION=7.2.0 make.cross ARCH=arm64 All errors (new ones prefixed by >>): >> arch/arm64/boot/dts/qcom/sdm845-mtp.dts:10:10: fatal error: dt-bindings/regulator/qcom,rpmh-regulator.h: No such file or directory #include <dt-bindings/regulator/qcom,rpmh-regulator.h> ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. vim +10 arch/arm64/boot/dts/qcom/sdm845-mtp.dts 9 > 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11 #include "sdm845.dtsi" 12 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation -------------- next part -------------- A non-text attachment was scrubbed... Name: .config.gz Type: application/gzip Size: 60562 bytes Desc: not available URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20180711/e6c22582/attachment-0001.gz> ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 3/3] arm64: dts: qcom: sdm845-mtp: Add nodes for USB 2018-07-10 22:01 [PATCH 0/3] arm64: dts: sdm845: Add RPMh-regulators and usb Douglas Anderson 2018-07-10 22:02 ` [PATCH 1/3] arm64: dts: qcom: sdm845: Add USB-related nodes Douglas Anderson 2018-07-10 22:02 ` [PATCH 2/3] arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators Douglas Anderson @ 2018-07-10 22:02 ` Douglas Anderson 2 siblings, 0 replies; 12+ messages in thread From: Douglas Anderson @ 2018-07-10 22:02 UTC (permalink / raw) To: linux-arm-kernel Set the various nodes to "okay" and hook up the regulators. NOTE: For now the main USB port (the one that goes out the Type C connector) is forced to host. Eventually someone will need to get the Type C detection hooked up and get this all integrated with the PMI8998 PMIC. The reason for forcing to "host" in the meantime is that this will leave us with one "host" and one "peripheral" port. In order for host mode this to work, we assume that the bootloader left things configured enough for us. Apparently the magic for that is is to do these writes on pmi8998: - pm_comm_write_byte(2, 0x1153, 0x2C, 0); - pm_comm_write_byte(2, 0x1152, 0x07, 0); - pm_comm_write_byte(2, 0x1140, 0x00, 0); - pm_comm_write_byte(2, 0x1140, 0x01, 0); Signed-off-by: Douglas Anderson <dianders@chromium.org> --- arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 61 +++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts index 1db4b9735e70..4e14f5f5c2f7 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts @@ -481,6 +481,67 @@ status = "okay"; }; +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + /* Until we have Type C hooked up we'll force this as host. */ + dr_mode = "host"; +}; + +&usb_1_hsphy { + status = "okay"; + + vdd-supply = <&vdda_usb1_ss_core>; + vdda-pll-supply = <&vdda_qusb_hs0_1p8>; + vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>; + + qcom,imp-res-offset-value = <8>; + qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; + qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; + qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; +}; + +&usb_1_qmpphy { + status = "okay"; + + vdda-phy-supply = <&vdda_usb1_ss_1p2>; + vdda-pll-supply = <&vdda_usb1_ss_core>; +}; + +&usb_2 { + status = "okay"; +}; + +&usb_2_dwc3 { + /* + * Though the USB block on SDM845 can support host, there's no vbus + * signal for this port on MTP. Thus (unless you have a non-compliant + * hub that works without vbus) the only sensible thing is to force + * peripheral mode. + */ + dr_mode = "peripheral"; +}; + +&usb_2_hsphy { + status = "okay"; + + vdd-supply = <&vdda_usb2_ss_core>; + vdda-pll-supply = <&vdda_qusb_hs0_1p8>; + vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>; + + qcom,imp-res-offset-value = <8>; + qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>; +}; + +&usb_2_qmpphy { + status = "okay"; + + vdda-phy-supply = <&vdda_usb2_ss_1p2>; + vdda-pll-supply = <&vdda_usb2_ss_core>; +}; + /* PINCTRL - additions to nodes defined in sdm845.dtsi */ &qup_i2c10_default { -- 2.18.0.203.gfac676dfb9-goog ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 0/3] arm64: dts: sdm845: Add RPMh-regulators and usb
@ 2018-08-10 21:51 Douglas Anderson
2018-08-10 21:51 ` [PATCH 1/3] arm64: dts: qcom: sdm845: Add USB-related nodes Douglas Anderson
0 siblings, 1 reply; 12+ messages in thread
From: Douglas Anderson @ 2018-08-10 21:51 UTC (permalink / raw)
To: linux-arm-kernel
This series adds device tree nodes for the RPMh regulators and USB.
These patches are based on patches in various downstream kernels from
Manu Gautam, David Collins, and Vivek Gautam.
This series was tested on SDM845-MTP (with no-AC firmware) atop Andy
Gross's current "for-next" branch at commit 76b9e7f947f1 ("Merge tag
'qcom-defconfig-for-4.19' into all-for-4.19") with some extra patches:
>From mainline:
- 87ed1405ef09 ("nvmem: Don't let a NULL cell_id for nvmem_cell_get() crash us")
>From clk-next:
- 9c7e47025a6b ("clk: qcom: clk-rpmh: Add QCOM RPMh clock driver")
>From regulator/for-next:
- 46fc033eba42 ("regulator: add QCOM RPMh regulator driver")
- 0db021f7a273 ("regulator: dt-bindings: add QCOM RPMh regulator bindings")
>From Will Deacon's tree (for-joerg/arm-smmu/updates):
- d1e20222d537 ("iommu/arm-smmu: Error out only if not enough context interrupts")
>From the mailing list (needs to be spun but works OK):
- dts: arm64/sdm845: Add node for arm,mmu-500
https://lore.kernel.org/patchwork/patch/964814/
As you can see from the above all the dependencies except the addition
of the MMU node have landed so this series should be about ready to
land too.
If anyone would like to see the tree I used for test, it can be found
at:
https://chromium.googlesource.com/chromiumos/third_party/kernel/+log/refs/sandbox/dianders/180810-agross-usbv2
Changes in v2:
- Use "0x784000" for qfprom rather than "0x780000" as per docs.
- Add calibration for 2nd USB port too
- LDO14 initial mode is LPM and shouldn't be always on (Vivek G)
- LDO25 should have min voltage of 3.3V
Douglas Anderson (2):
arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators
arm64: dts: qcom: sdm845-mtp: Add nodes for USB
Manu Gautam (1):
arm64: dts: qcom: sdm845: Add USB-related nodes
arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 506 ++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sdm845.dtsi | 196 +++++++++
2 files changed, 702 insertions(+)
--
2.18.0.597.ga71716f1ad-goog
^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH 1/3] arm64: dts: qcom: sdm845: Add USB-related nodes 2018-08-10 21:51 [PATCH 0/3] arm64: dts: sdm845: Add RPMh-regulators and usb Douglas Anderson @ 2018-08-10 21:51 ` Douglas Anderson 2018-08-20 18:17 ` Stephen Boyd 0 siblings, 1 reply; 12+ messages in thread From: Douglas Anderson @ 2018-08-10 21:51 UTC (permalink / raw) To: linux-arm-kernel From: Manu Gautam <mgautam@codeaurora.org> This adds nodes for USB and related PHYs. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> [dianders: reworked quite a bit] Signed-off-by: Douglas Anderson <dianders@chromium.org> --- Changes in v2: - Use "0x784000" for qfprom rather than "0x780000" as per docs. - Add calibration for 2nd USB port too arch/arm64/boot/dts/qcom/sdm845.dtsi | 196 +++++++++++++++++++++++++++ 1 file changed, 196 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index ae57c065780c..f13d8c2fb4a5 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/clock/qcom,gcc-sdm845.h> #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qusb2.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> / { @@ -249,6 +250,23 @@ #power-domain-cells = <1>; }; + qfprom at 784000 { + compatible = "qcom,qfprom"; + reg = <0x780000 0x8ff>; + #address-cells = <1>; + #size-cells = <1>; + + qusb2p_hstx_trim: hstx-trim-primary at 1eb { + reg = <0x1eb 0x1>; + bits = <1 4>; + }; + + qusb2s_hstx_trim: hstx-trim-secondary at 1eb { + reg = <0x1eb 0x2>; + bits = <6 4>; + }; + }; + qupv3_id_0: geniqup at 8c0000 { compatible = "qcom,geni-se-qup"; reg = <0x8c0000 0x6000>; @@ -962,6 +980,184 @@ }; }; + usb_1_hsphy: phy at 88e2000 { + compatible = "qcom,sdm845-qusb2-phy"; + reg = <0x88e2000 0x400>; + status = "disabled"; + #phy-cells = <0>; + + clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "cfg_ahb", "ref"; + + resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; + + nvmem-cells = <&qusb2p_hstx_trim>; + }; + + usb_2_hsphy: phy at 88e3000 { + compatible = "qcom,sdm845-qusb2-phy"; + reg = <0x88e3000 0x400>; + status = "disabled"; + #phy-cells = <0>; + + clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "cfg_ahb", "ref"; + + resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; + + nvmem-cells = <&qusb2s_hstx_trim>; + }; + + usb_1_qmpphy: phy at 88e9000 { + compatible = "qcom,sdm845-qmp-usb3-phy"; + reg = <0x88e9000 0x18c>, + <0x88e8000 0x10>; + reg-names = "reg-base", "dp_com"; + status = "disabled"; + #clock-cells = <1>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, + <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&gcc GCC_USB3_PRIM_CLKREF_CLK>, + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; + clock-names = "aux", "cfg_ahb", "ref", "com_aux"; + + resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, + <&gcc GCC_USB3_PHY_PRIM_BCR>; + reset-names = "phy", "common"; + + usb_1_ssphy: lane at 88e9200 { + reg = <0x88e9200 0x128>, + <0x88e9400 0x200>, + <0x88e9c00 0x218>, + <0x88e9a00 0x100>; + #phy-cells = <0>; + clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "pipe0"; + clock-output-names = "usb3_phy_pipe_clk_src"; + }; + }; + + usb_2_qmpphy: phy at 88eb000 { + compatible = "qcom,sdm845-qmp-usb3-uni-phy"; + reg = <0x88eb000 0x18c>; + status = "disabled"; + #clock-cells = <1>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, + <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&gcc GCC_USB3_SEC_CLKREF_CLK>, + <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; + clock-names = "aux", "cfg_ahb", "ref", "com_aux"; + + resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, + <&gcc GCC_USB3_PHY_SEC_BCR>; + reset-names = "phy", "common"; + + usb_2_ssphy: lane at 88eb200 { + reg = <0x88eb200 0x128>, + <0x88eb400 0x1fc>, + <0x88eb800 0x218>, + <0x88e9600 0x70>; + #phy-cells = <0>; + clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; + clock-names = "pipe0"; + clock-output-names = "usb3_uni_phy_pipe_clk_src"; + }; + }; + + usb_1: usb at a6f8800 { + compatible = "qcom,sdm845-dwc3", "qcom,dwc3"; + reg = <0xa6f8800 0x400>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_PRIM_SLEEP_CLK>; + clock-names = "cfg_noc", "core", "iface", "mock_utmi", + "sleep"; + + assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>; + assigned-clock-rates = <19200000>, <150000000>; + + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hs_phy_irq", "ss_phy_irq", + "dm_hs_phy_irq", "dp_hs_phy_irq"; + + power-domains = <&gcc USB30_PRIM_GDSC>; + + resets = <&gcc GCC_USB30_PRIM_BCR>; + + usb_1_dwc3: dwc3 at a600000 { + compatible = "snps,dwc3"; + reg = <0xa600000 0xcd00>; + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + + usb_2: usb at a8f8800 { + compatible = "qcom,sdm845-dwc3", "qcom,dwc3"; + reg = <0xa8f8800 0x400>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, + <&gcc GCC_USB30_SEC_MASTER_CLK>, + <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, + <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_SEC_SLEEP_CLK>; + clock-names = "cfg_noc", "core", "iface", "mock_utmi", + "sleep"; + + assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_SEC_MASTER_CLK>; + assigned-clock-rates = <19200000>, <150000000>; + + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hs_phy_irq", "ss_phy_irq", + "dm_hs_phy_irq", "dp_hs_phy_irq"; + + power-domains = <&gcc USB30_SEC_GDSC>; + + resets = <&gcc GCC_USB30_SEC_BCR>; + + usb_2_dwc3: dwc3 at a800000 { + compatible = "snps,dwc3"; + reg = <0xa800000 0xcd00>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_2_hsphy>, <&usb_2_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + spmi_bus: spmi at c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0xc440000 0x1100>, -- 2.18.0.597.ga71716f1ad-goog ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 1/3] arm64: dts: qcom: sdm845: Add USB-related nodes 2018-08-10 21:51 ` [PATCH 1/3] arm64: dts: qcom: sdm845: Add USB-related nodes Douglas Anderson @ 2018-08-20 18:17 ` Stephen Boyd 2018-08-22 17:37 ` Doug Anderson 0 siblings, 1 reply; 12+ messages in thread From: Stephen Boyd @ 2018-08-20 18:17 UTC (permalink / raw) To: linux-arm-kernel Quoting Douglas Anderson (2018-08-10 14:51:48) > From: Manu Gautam <mgautam@codeaurora.org> > > This adds nodes for USB and related PHYs. > > Signed-off-by: Manu Gautam <mgautam@codeaurora.org> > [dianders: reworked quite a bit] > Signed-off-by: Douglas Anderson <dianders@chromium.org> > --- One question below, otherwise Reviewed-by: Stephen Boyd <swboyd@chromium.org> > > Changes in v2: > - Use "0x784000" for qfprom rather than "0x780000" as per docs. ? > - Add calibration for 2nd USB port too > > arch/arm64/boot/dts/qcom/sdm845.dtsi | 196 +++++++++++++++++++++++++++ > 1 file changed, 196 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index ae57c065780c..f13d8c2fb4a5 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -8,6 +8,7 @@ > #include <dt-bindings/clock/qcom,gcc-sdm845.h> > #include <dt-bindings/clock/qcom,rpmh.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > +#include <dt-bindings/phy/phy-qcom-qusb2.h> > #include <dt-bindings/soc/qcom,rpmh-rsc.h> > > / { > @@ -249,6 +250,23 @@ > #power-domain-cells = <1>; > }; > > + qfprom at 784000 { This doesn't match reg property. > + compatible = "qcom,qfprom"; > + reg = <0x780000 0x8ff>; Because this should be 0x784000? > + #address-cells = <1>; > + #size-cells = <1>; > + > + qusb2p_hstx_trim: hstx-trim-primary at 1eb { > + reg = <0x1eb 0x1>; > + bits = <1 4>; > + }; > + > + qusb2s_hstx_trim: hstx-trim-secondary at 1eb { > + reg = <0x1eb 0x2>; > + bits = <6 4>; > + }; > + }; > + > qupv3_id_0: geniqup at 8c0000 { > compatible = "qcom,geni-se-qup"; > reg = <0x8c0000 0x6000>; ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 1/3] arm64: dts: qcom: sdm845: Add USB-related nodes 2018-08-20 18:17 ` Stephen Boyd @ 2018-08-22 17:37 ` Doug Anderson 0 siblings, 0 replies; 12+ messages in thread From: Doug Anderson @ 2018-08-22 17:37 UTC (permalink / raw) To: linux-arm-kernel Hi, On Mon, Aug 20, 2018 at 11:17 AM, Stephen Boyd <swboyd@chromium.org> wrote: >> + qfprom at 784000 { > > This doesn't match reg property. > >> + compatible = "qcom,qfprom"; >> + reg = <0x780000 0x8ff>; > > Because this should be 0x784000? Thank you for catching. This ought to be fixed in v3. -Doug ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2018-08-22 17:37 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2018-07-10 22:01 [PATCH 0/3] arm64: dts: sdm845: Add RPMh-regulators and usb Douglas Anderson 2018-07-10 22:02 ` [PATCH 1/3] arm64: dts: qcom: sdm845: Add USB-related nodes Douglas Anderson 2018-07-12 16:56 ` Doug Anderson 2018-07-10 22:02 ` [PATCH 2/3] arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators Douglas Anderson 2018-07-10 22:32 ` David Collins 2018-07-10 22:55 ` Doug Anderson 2018-07-10 23:01 ` David Collins 2018-07-11 2:57 ` kbuild test robot 2018-07-10 22:02 ` [PATCH 3/3] arm64: dts: qcom: sdm845-mtp: Add nodes for USB Douglas Anderson 2018-08-10 21:51 [PATCH 0/3] arm64: dts: sdm845: Add RPMh-regulators and usb Douglas Anderson 2018-08-10 21:51 ` [PATCH 1/3] arm64: dts: qcom: sdm845: Add USB-related nodes Douglas Anderson 2018-08-20 18:17 ` Stephen Boyd 2018-08-22 17:37 ` Doug Anderson
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