* [PATCH 1/2] ARM: dts: imx7ulp: add sim node
@ 2018-12-14 8:20 Anson Huang
2018-12-14 8:20 ` [PATCH 2/2] ARM: imx: add i.MX7ULP SoC revision support Anson Huang
2019-01-11 2:53 ` [PATCH 1/2] ARM: dts: imx7ulp: add sim node Shawn Guo
0 siblings, 2 replies; 3+ messages in thread
From: Anson Huang @ 2018-12-14 8:20 UTC (permalink / raw)
To: shawnguo, s.hauer, kernel, Fabio Estevam, robh+dt, mark.rutland,
linux, linux-arm-kernel, devicetree, linux-kernel
Cc: dl-linux-imx
i.MX7ULP SoC revision info is inside the SIM mode's JTAG_ID
register, add sim node to support SoC revision check.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
arch/arm/boot/dts/imx7ulp.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index b86daf7..fca6e50 100644
--- a/arch/arm/boot/dts/imx7ulp.dtsi
+++ b/arch/arm/boot/dts/imx7ulp.dtsi
@@ -347,4 +347,17 @@
gpio-ranges = <&iomuxc1 0 96 32>;
};
};
+
+ m4aips1: bus@41080000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x41080000 0x80000>;
+ ranges;
+
+ sim: sim@410a3000 {
+ compatible = "fsl,imx7ulp-sim", "syscon";
+ reg = <0x410a3000 0x1000>;
+ };
+ };
};
--
2.7.4
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^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] ARM: imx: add i.MX7ULP SoC revision support
2018-12-14 8:20 [PATCH 1/2] ARM: dts: imx7ulp: add sim node Anson Huang
@ 2018-12-14 8:20 ` Anson Huang
2019-01-11 2:53 ` [PATCH 1/2] ARM: dts: imx7ulp: add sim node Shawn Guo
1 sibling, 0 replies; 3+ messages in thread
From: Anson Huang @ 2018-12-14 8:20 UTC (permalink / raw)
To: shawnguo, s.hauer, kernel, Fabio Estevam, robh+dt, mark.rutland,
linux, linux-arm-kernel, devicetree, linux-kernel
Cc: dl-linux-imx
i.MX7ULP SoC's revision info is inside the SIM module,
bit[31:28] of JTAG_ID register defines revision as below
from B0:
0001 B0
0010 B1
This patch adds SoC revision support for i.MX7ULP, test
result as below:
root@imx7ulp-evk ~$ cat /sys/devices/soc0/revision
2.1
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
arch/arm/mach-imx/mach-imx7ulp.c | 39 +++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/mach-imx/mach-imx7ulp.c b/arch/arm/mach-imx/mach-imx7ulp.c
index f7c9d01..95efb2d 100644
--- a/arch/arm/mach-imx/mach-imx7ulp.c
+++ b/arch/arm/mach-imx/mach-imx7ulp.c
@@ -6,18 +6,57 @@
*/
#include <linux/irqchip.h>
+#include <linux/mfd/syscon.h>
#include <linux/of_platform.h>
+#include <linux/regmap.h>
#include <asm/mach/arch.h>
#include "common.h"
#include "cpuidle.h"
#include "hardware.h"
+#define SIM_JTAG_ID_REG 0x8c
+
+static void __init imx7ulp_set_revision(void)
+{
+ struct regmap *sim;
+ u32 revision;
+
+ sim = syscon_regmap_lookup_by_compatible("fsl,imx7ulp-sim");
+ if (IS_ERR(sim)) {
+ pr_warn("failed to find fsl,imx7ulp-sim regmap!\n");
+ return;
+ }
+
+ if (regmap_read(sim, SIM_JTAG_ID_REG, &revision)) {
+ pr_warn("failed to read sim regmap!\n");
+ return;
+ }
+
+ /*
+ * bit[31:28] of JTAG_ID register defines revision as below from B0:
+ * 0001 B0
+ * 0010 B1
+ */
+ switch (revision >> 28) {
+ case 1:
+ imx_set_soc_revision(IMX_CHIP_REVISION_2_0);
+ break;
+ case 2:
+ imx_set_soc_revision(IMX_CHIP_REVISION_2_1);
+ break;
+ default:
+ imx_set_soc_revision(IMX_CHIP_REVISION_1_0);
+ break;
+ }
+}
+
static void __init imx7ulp_init_machine(void)
{
imx7ulp_pm_init();
mxc_set_cpu_type(MXC_CPU_IMX7ULP);
+ imx7ulp_set_revision();
of_platform_default_populate(NULL, NULL, imx_soc_device_init());
}
--
2.7.4
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^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/2] ARM: dts: imx7ulp: add sim node
2018-12-14 8:20 [PATCH 1/2] ARM: dts: imx7ulp: add sim node Anson Huang
2018-12-14 8:20 ` [PATCH 2/2] ARM: imx: add i.MX7ULP SoC revision support Anson Huang
@ 2019-01-11 2:53 ` Shawn Guo
1 sibling, 0 replies; 3+ messages in thread
From: Shawn Guo @ 2019-01-11 2:53 UTC (permalink / raw)
To: Anson Huang
Cc: mark.rutland, devicetree, s.hauer, linux, linux-kernel, robh+dt,
dl-linux-imx, kernel, Fabio Estevam, linux-arm-kernel
On Fri, Dec 14, 2018 at 08:20:22AM +0000, Anson Huang wrote:
> i.MX7ULP SoC revision info is inside the SIM mode's JTAG_ID
> register, add sim node to support SoC revision check.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> arch/arm/boot/dts/imx7ulp.dtsi | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
> index b86daf7..fca6e50 100644
> --- a/arch/arm/boot/dts/imx7ulp.dtsi
> +++ b/arch/arm/boot/dts/imx7ulp.dtsi
> @@ -347,4 +347,17 @@
> gpio-ranges = <&iomuxc1 0 96 32>;
> };
> };
> +
> + m4aips1: bus@41080000 {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x41080000 0x80000>;
> + ranges;
> +
> + sim: sim@410a3000 {
> + compatible = "fsl,imx7ulp-sim", "syscon";
The compatible needs to be documented. Also we generally compose a series
in order below.
- Bindings patch
- Kernel patch
- DTS patch
Shawn
> + reg = <0x410a3000 0x1000>;
> + };
> + };
> };
> --
> 2.7.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 3+ messages in thread
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