From: Chen-Yu Tsai <wens@csie.org> To: Maxime Ripard <maxime.ripard@bootlin.com> Cc: devicetree@vger.kernel.org, Sergey Matyukevich <geomatsi@gmail.com>, Andre Przywara <andre.przywara@arm.com>, Chen-Yu Tsai <wens@csie.org>, linux-kernel@vger.kernel.org, Emmanuel Vadot <manu@freebsd.org>, linux-sunxi@googlegroups.com, Jagan Teki <jagan@amarulasolutions.com>, Hauke Mehrtens <hauke@hauke-m.de>, linux-arm-kernel@lists.infradead.org, Icenowy Zheng <icenowy@aosc.io> Subject: [PATCH 10/10] arm64: dts: allwinner: h5: Add CPU Operating Performance Points table Date: Wed, 30 Jan 2019 16:42:03 +0800 Message-ID: <20190130084203.25053-11-wens@csie.org> (raw) In-Reply-To: <20190130084203.25053-1-wens@csie.org> Add an OPP (Operating Performance Points) table for the CPU cores to enable DVFS (Dynamic Voltage & Frequency Scaling) on the H5. The table originates from Armbian, but the maximum voltage is raised slightly to account for boards using slightly higher voltages. This has been tested on the Libre Computer ALL-H3-CC-H5 and the Bananapi M2+ v1.2 H5, both with adequate cooling. The former has a fixed 1.2V regulator, while the latter has a GPIO controlled regulator switchable between 1.1V and 1.3V. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 67 ++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi index 25bb8227a6fd..0e83b8a25f9c 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi @@ -54,6 +54,8 @@ enable-method = "psci"; clocks = <&ccu CLK_CPUX>; clock-latency-ns = <244144>; /* 8 32k periods */ + operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; }; cpu@1 { @@ -63,6 +65,8 @@ enable-method = "psci"; clocks = <&ccu CLK_CPUX>; clock-latency-ns = <244144>; /* 8 32k periods */ + operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; }; cpu@2 { @@ -72,6 +76,8 @@ enable-method = "psci"; clocks = <&ccu CLK_CPUX>; clock-latency-ns = <244144>; /* 8 32k periods */ + operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; }; cpu@3 { @@ -81,6 +87,67 @@ enable-method = "psci"; clocks = <&ccu CLK_CPUX>; clock-latency-ns = <244144>; /* 8 32k periods */ + operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; + }; + }; + + cpu_opp_table: opp_table { + compatible = "operating-points-v2"; + opp-shared; + + opp@408000000 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <1000000 1000000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@648000000 { + opp-hz = /bits/ 64 <648000000>; + opp-microvolt = <1040000 1040000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@816000000 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <1080000 1080000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@912000000 { + opp-hz = /bits/ 64 <912000000>; + opp-microvolt = <1120000 1120000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@960000000 { + opp-hz = /bits/ 64 <960000000>; + opp-microvolt = <1160000 1160000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1200000 1200000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@1056000000 { + opp-hz = /bits/ 64 <1056000000>; + opp-microvolt = <1240000 1240000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <1260000 1260000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@1152000000 { + opp-hz = /bits/ 64 <1152000000>; + opp-microvolt = <1300000 1300000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ }; }; -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply index Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-01-30 8:41 [PATCH 00/10] arm64: dts: allwinner: h5: Enable CPU DVFS (cpufreq) Chen-Yu Tsai 2019-01-30 8:41 ` [PATCH 01/10] ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages Chen-Yu Tsai 2019-01-30 8:41 ` [PATCH 02/10] ARM: dts: bananapi-m2-plus: Add CPU supply regulator Chen-Yu Tsai 2019-01-30 8:41 ` [PATCH 03/10] arm64: dts: allwinner: h5: Hook up cpu regulator supplies Chen-Yu Tsai 2019-01-30 8:41 ` [PATCH 04/10] arm64: dts: allwinner: h5: nanopi-neo2: Add CPU regulator supply Chen-Yu Tsai 2019-01-30 8:41 ` [PATCH 05/10] arm64: dts: allwinner: h5: orange-pi-zero-plus: " Chen-Yu Tsai 2019-01-30 8:41 ` [PATCH 06/10] arm64: dts: allwinner: h5: orange-pi-zero-plus2: " Chen-Yu Tsai 2019-01-30 8:42 ` [PATCH 07/10] arm64: dts: allwinner: h5: orange-pi-pc2: " Chen-Yu Tsai 2019-01-30 8:42 ` [PATCH 08/10] arm64: dts: allwinner: h5: orange-pi-prime: " Chen-Yu Tsai 2019-01-30 8:42 ` [PATCH 09/10] arm64: dts: allwinner: h5: Add clock to CPU cores Chen-Yu Tsai 2019-01-30 8:42 ` Chen-Yu Tsai [this message] 2019-01-30 9:29 ` [PATCH 10/10] arm64: dts: allwinner: h5: Add CPU Operating Performance Points table Maxime Ripard 2019-01-30 9:41 ` Chen-Yu Tsai 2019-01-30 9:59 ` Maxime Ripard 2019-01-31 3:28 ` Chen-Yu Tsai 2019-09-02 14:03 ` [PATCH 00/10] arm64: dts: allwinner: h5: Enable CPU DVFS (cpufreq) Ondřej Jirman
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