From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: devicetree <devicetree@vger.kernel.org>,
Sergey Matyukevich <geomatsi@gmail.com>,
Andre Przywara <andre.przywara@arm.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
Emmanuel Vadot <manu@freebsd.org>,
linux-sunxi <linux-sunxi@googlegroups.com>,
Jagan Teki <jagan@amarulasolutions.com>,
Hauke Mehrtens <hauke@hauke-m.de>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
Icenowy Zheng <icenowy@aosc.io>
Subject: Re: [PATCH 10/10] arm64: dts: allwinner: h5: Add CPU Operating Performance Points table
Date: Wed, 30 Jan 2019 10:59:12 +0100 [thread overview]
Message-ID: <20190130095912.yq6anxqnczi6btpv@flea> (raw)
In-Reply-To: <CAGb2v64ZFZty-jeeKmPU8Ecg+rAE6zEm65tedb_ZZTTSXMEPOA@mail.gmail.com>
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On Wed, Jan 30, 2019 at 05:41:16PM +0800, Chen-Yu Tsai wrote:
> On Wed, Jan 30, 2019 at 5:29 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> >
> > On Wed, Jan 30, 2019 at 04:42:03PM +0800, Chen-Yu Tsai wrote:
> > > enable-method = "psci";
> > > clocks = <&ccu CLK_CPUX>;
> > > clock-latency-ns = <244144>; /* 8 32k periods */
> > > + operating-points-v2 = <&cpu_opp_table>;
> > > + #cooling-cells = <2>;
> > > + };
> > > + };
> > > +
> > > + cpu_opp_table: opp_table {
> > > + compatible = "operating-points-v2";
> > > + opp-shared;
> > > +
> > > + opp@408000000 {
> > > + opp-hz = /bits/ 64 <408000000>;
> > > + opp-microvolt = <1000000 1000000 1310000>;
> > > + clock-latency-ns = <244144>; /* 8 32k periods */
> > > + };
> > > +
> > > + opp@648000000 {
> > > + opp-hz = /bits/ 64 <648000000>;
> > > + opp-microvolt = <1040000 1040000 1310000>;
> > > + clock-latency-ns = <244144>; /* 8 32k periods */
> > > + };
> > > +
> > > + opp@816000000 {
> > > + opp-hz = /bits/ 64 <816000000>;
> > > + opp-microvolt = <1080000 1080000 1310000>;
> > > + clock-latency-ns = <244144>; /* 8 32k periods */
> > > + };
> > > +
> > > + opp@912000000 {
> > > + opp-hz = /bits/ 64 <912000000>;
> > > + opp-microvolt = <1120000 1120000 1310000>;
> > > + clock-latency-ns = <244144>; /* 8 32k periods */
> > > + };
> > > +
> > > + opp@960000000 {
> > > + opp-hz = /bits/ 64 <960000000>;
> > > + opp-microvolt = <1160000 1160000 1310000>;
> > > + clock-latency-ns = <244144>; /* 8 32k periods */
> > > + };
> > > +
> > > + opp@1008000000 {
> > > + opp-hz = /bits/ 64 <1008000000>;
> > > + opp-microvolt = <1200000 1200000 1310000>;
> > > + clock-latency-ns = <244144>; /* 8 32k periods */
> > > + };
> > > +
> > > + opp@1056000000 {
> > > + opp-hz = /bits/ 64 <1056000000>;
> > > + opp-microvolt = <1240000 1240000 1310000>;
> > > + clock-latency-ns = <244144>; /* 8 32k periods */
> > > + };
> > > +
> > > + opp@1104000000 {
> > > + opp-hz = /bits/ 64 <1104000000>;
> > > + opp-microvolt = <1260000 1260000 1310000>;
> > > + clock-latency-ns = <244144>; /* 8 32k periods */
> > > + };
> > > +
> > > + opp@1152000000 {
> > > + opp-hz = /bits/ 64 <1152000000>;
> > > + opp-microvolt = <1300000 1300000 1310000>;
> > > + clock-latency-ns = <244144>; /* 8 32k periods */
> >
> > What is the frequency and voltage that U-Boot sets up?
>
> 1008 MHz, and whatever voltage the board design defaults to (typically
> the higher setting).
>
> > We've had the issue with the A33 that it's started at 1008MHz, with
> > the matching voltage, and ramping up the frequency to 1.2GHz on boards
> > without PMIC support would increase the frequency but not the voltage,
> > resulting in a brownout.
>
> Which is why I added the regulator to all boards before this patch. At
> least for Linux, once the regulator supply is described in the device
> tree, if the driver is missing, regulator_get_* and thus cpufreq should
> fail with -EPROBE_DEFER.
>
> Or we could drop the extra OPPs.
Ok, if you covered all of them then fine by me. For the whole series,
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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next prev parent reply other threads:[~2019-01-30 9:59 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-30 8:41 [PATCH 00/10] arm64: dts: allwinner: h5: Enable CPU DVFS (cpufreq) Chen-Yu Tsai
2019-01-30 8:41 ` [PATCH 01/10] ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages Chen-Yu Tsai
2019-01-30 8:41 ` [PATCH 02/10] ARM: dts: bananapi-m2-plus: Add CPU supply regulator Chen-Yu Tsai
2019-01-30 8:41 ` [PATCH 03/10] arm64: dts: allwinner: h5: Hook up cpu regulator supplies Chen-Yu Tsai
2019-01-30 8:41 ` [PATCH 04/10] arm64: dts: allwinner: h5: nanopi-neo2: Add CPU regulator supply Chen-Yu Tsai
2019-01-30 8:41 ` [PATCH 05/10] arm64: dts: allwinner: h5: orange-pi-zero-plus: " Chen-Yu Tsai
2019-01-30 8:41 ` [PATCH 06/10] arm64: dts: allwinner: h5: orange-pi-zero-plus2: " Chen-Yu Tsai
2019-01-30 8:42 ` [PATCH 07/10] arm64: dts: allwinner: h5: orange-pi-pc2: " Chen-Yu Tsai
2019-01-30 8:42 ` [PATCH 08/10] arm64: dts: allwinner: h5: orange-pi-prime: " Chen-Yu Tsai
2019-01-30 8:42 ` [PATCH 09/10] arm64: dts: allwinner: h5: Add clock to CPU cores Chen-Yu Tsai
2019-01-30 8:42 ` [PATCH 10/10] arm64: dts: allwinner: h5: Add CPU Operating Performance Points table Chen-Yu Tsai
2019-01-30 9:29 ` Maxime Ripard
2019-01-30 9:41 ` Chen-Yu Tsai
2019-01-30 9:59 ` Maxime Ripard [this message]
2019-01-31 3:28 ` Chen-Yu Tsai
2019-09-02 14:03 ` [PATCH 00/10] arm64: dts: allwinner: h5: Enable CPU DVFS (cpufreq) Ondřej Jirman
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