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From: Carlo Caione <ccaione@baylibre.com>
To: robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org,
	s.hauer@pengutronix.de, kernel@pengutronix.de,
	festevam@gmail.com, linux-imx@nxp.com, l.stach@pengutronix.de,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Cc: Carlo Caione <ccaione@baylibre.com>
Subject: [PATCH v2 2/2] dt-bindings: imx-ocotp: Add i.MX8MQ compatible
Date: Sat,  2 Feb 2019 15:06:38 +0000
Message-ID: <20190202150638.13672-3-ccaione@baylibre.com> (raw)
In-Reply-To: <20190202150638.13672-1-ccaione@baylibre.com>

Document the new compatible for the i.MX8MQ SoC.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
---
 Documentation/devicetree/bindings/nvmem/imx-ocotp.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
index 7a999a135e56..fec66e3b45c3 100644
--- a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
+++ b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
@@ -13,6 +13,7 @@ Required properties:
 	"fsl,imx7d-ocotp" (i.MX7D/S),
 	"fsl,imx6sll-ocotp" (i.MX6SLL),
 	"fsl,imx7ulp-ocotp" (i.MX7ULP),
+	"fsl,imx8mq-ocotp" (i.MX8MQ),
 	followed by "syscon".
 - #address-cells : Should be 1
 - #size-cells : Should be 1
-- 
2.19.1


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  parent reply index

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-02 15:06 [PATCH v2 0/2] Add and document the i.MX8MQ OTP controller Carlo Caione
2019-02-02 15:06 ` [PATCH v2 1/2] arm64: dts: imx8mq: Add on-chip OTP controller node Carlo Caione
2019-02-04 10:26   ` Lucas Stach
2019-02-11 12:03   ` Lucas Stach
2019-02-11 13:01     ` Lucas Stach
2019-02-02 15:06 ` Carlo Caione [this message]
2019-02-25 15:11 ` [PATCH v2 0/2] Add and document the i.MX8MQ OTP controller Abel Vesa
2019-02-26  8:57   ` Carlo Caione
2019-02-26  9:01     ` Abel Vesa
2019-02-26  9:03     ` Lucas Stach

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