From: Bartosz Golaszewski <brgl@bgdev.pl>
To: Sekhar Nori <nsekhar@ti.com>, Kevin Hilman <khilman@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Thomas Gleixner <tglx@linutronix.de>,
David Lechner <david@lechnology.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Bartosz Golaszewski <bgolaszewski@baylibre.com>
Subject: [PATCH v2 26/33] ARM: davinci: cp-intc: use the new-style config structure
Date: Fri, 8 Feb 2019 18:34:51 +0100 [thread overview]
Message-ID: <20190208173458.4801-27-brgl@bgdev.pl> (raw)
In-Reply-To: <20190208173458.4801-1-brgl@bgdev.pl>
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Modify the cp-intc driver to take all its configuration from the new
config structure. Stop referencing davinci_soc_info in any way.
Move the declaration for davinci_cp_intc_init() to
irq-davinci-cp-intc.h and make it take the new config structure as
parameter. Convert all users to the new version.
Also: since the two da8xx SoCs default all irq priorities to 7, just
drop the priority configuration at all and hardcode the channels to 7.
It will simplify the driver code and make our lives easier when it
comes to device-tree support.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/cp_intc.c | 93 +++++++++------------
arch/arm/mach-davinci/da830.c | 2 +-
arch/arm/mach-davinci/da850.c | 2 +-
arch/arm/mach-davinci/include/mach/common.h | 1 -
include/linux/irqchip/irq-davinci-cp-intc.h | 2 +
5 files changed, 44 insertions(+), 56 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index dcd43b067a6a..faf3d74d3719 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -13,6 +13,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/irqchip.h>
+#include <linux/irqchip/irq-davinci-cp-intc.h>
#include <linux/irqdomain.h>
#include <linux/io.h>
#include <linux/of.h>
@@ -20,7 +21,6 @@
#include <linux/of_irq.h>
#include <asm/exception.h>
-#include <mach/common.h>
#define DAVINCI_CP_INTC_CTRL 0x04
#define DAVINCI_CP_INTC_HOST_CTRL 0x0c
@@ -158,22 +158,15 @@ static const struct irq_domain_ops davinci_cp_intc_irq_domain_ops = {
.xlate = irq_domain_xlate_onetwocell,
};
-static int __init davinci_cp_intc_of_init(struct device_node *node,
- struct device_node *parent)
+static int __init
+davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config,
+ struct device_node *node)
{
- u32 num_irq = davinci_soc_info.intc_irq_num;
- u8 *irq_prio = davinci_soc_info.intc_irq_prios;
- unsigned num_reg = BITS_TO_LONGS(num_irq);
- int i, irq_base;
-
- if (node) {
- davinci_cp_intc_base = of_iomap(node, 0);
- if (of_property_read_u32(node, "ti,intc-size", &num_irq))
- pr_warn("unable to get intc-size, default to %d\n",
- num_irq);
- } else {
- davinci_cp_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
- }
+ unsigned int num_regs = BITS_TO_LONGS(config->num_irqs);
+ int offset, irq_base;
+
+ davinci_cp_intc_base = ioremap(config->reg.start,
+ resource_size(&config->reg));
if (WARN_ON(!davinci_cp_intc_base))
return -EINVAL;
@@ -183,51 +176,29 @@ static int __init davinci_cp_intc_of_init(struct device_node *node,
davinci_cp_intc_write(0, DAVINCI_CP_INTC_HOST_ENABLE(0));
/* Disable system interrupts */
- for (i = 0; i < num_reg; i++)
- davinci_cp_intc_write(~0, DAVINCI_CP_INTC_SYS_ENABLE_CLR(i));
+ for (offset = 0; offset < num_regs; offset++)
+ davinci_cp_intc_write(~0,
+ DAVINCI_CP_INTC_SYS_ENABLE_CLR(offset));
/* Set to normal mode, no nesting, no priority hold */
davinci_cp_intc_write(0, DAVINCI_CP_INTC_CTRL);
davinci_cp_intc_write(0, DAVINCI_CP_INTC_HOST_CTRL);
/* Clear system interrupt status */
- for (i = 0; i < num_reg; i++)
- davinci_cp_intc_write(~0, DAVINCI_CP_INTC_SYS_STAT_CLR(i));
+ for (offset = 0; offset < num_regs; offset++)
+ davinci_cp_intc_write(~0,
+ DAVINCI_CP_INTC_SYS_STAT_CLR(offset));
/* Enable nIRQ (what about nFIQ?) */
davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET);
- /*
- * Priority is determined by host channel: lower channel number has
- * higher priority i.e. channel 0 has highest priority and channel 31
- * had the lowest priority.
- */
- num_reg = (num_irq + 3) >> 2; /* 4 channels per register */
- if (irq_prio) {
- unsigned j, k;
- u32 val;
-
- for (k = i = 0; i < num_reg; i++) {
- for (val = j = 0; j < 4; j++, k++) {
- val >>= 8;
- if (k < num_irq)
- val |= irq_prio[k] << 24;
- }
-
- davinci_cp_intc_write(val, DAVINCI_CP_INTC_CHAN_MAP(i));
- }
- } else {
- /*
- * Default everything to channel 15 if priority not specified.
- * Note that channel 0-1 are mapped to nFIQ and channels 2-31
- * are mapped to nIRQ.
- */
- for (i = 0; i < num_reg; i++)
- davinci_cp_intc_write(0x0f0f0f0f,
- DAVINCI_CP_INTC_CHAN_MAP(i));
- }
+ /* Default all priorities to channel 7. */
+ num_regs = (config->num_irqs + 3) >> 2; /* 4 channels per register */
+ for (offset = 0; offset < num_regs; offset++)
+ davinci_cp_intc_write(0x07070707,
+ DAVINCI_CP_INTC_CHAN_MAP(offset));
- irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
+ irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0);
if (irq_base < 0) {
pr_warn("Couldn't allocate IRQ numbers\n");
irq_base = 0;
@@ -235,7 +206,7 @@ static int __init davinci_cp_intc_of_init(struct device_node *node,
/* create a legacy host */
davinci_cp_intc_irq_domain = irq_domain_add_legacy(
- node, num_irq, irq_base, 0,
+ node, config->num_irqs, irq_base, 0,
&davinci_cp_intc_irq_domain_ops, NULL);
if (!davinci_cp_intc_irq_domain) {
@@ -251,9 +222,25 @@ static int __init davinci_cp_intc_of_init(struct device_node *node,
return 0;
}
-void __init davinci_cp_intc_init(void)
+int __init davinci_cp_intc_init(const struct davinci_cp_intc_config *config)
{
- davinci_cp_intc_of_init(NULL, NULL);
+ return davinci_cp_intc_do_init(config, NULL);
}
+static int __init davinci_cp_intc_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ struct davinci_cp_intc_config config = { };
+ int ret;
+
+ ret = of_address_to_resource(node, 0, &config.reg);
+ if (WARN_ON(ret))
+ return ret;
+
+ ret = of_property_read_u32(node, "ti,intc-size", &config.num_irqs);
+ if (WARN_ON(ret))
+ return ret;
+
+ return davinci_cp_intc_do_init(&config, node);
+}
IRQCHIP_DECLARE(cp_intc, "ti,cp-intc", davinci_cp_intc_of_init);
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 0eb48ed2d423..7ce0b5f1200d 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -833,7 +833,7 @@ static const struct davinci_cp_intc_config da830_cp_intc_config = {
void __init da830_init_irq(void)
{
- davinci_cp_intc_init();
+ davinci_cp_intc_init(&da830_cp_intc_config);
}
void __init da830_init_time(void)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index fe274ab63fc8..62a00fa94696 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -771,7 +771,7 @@ static const struct davinci_cp_intc_config da850_cp_intc_config = {
void __init da850_init_irq(void)
{
- davinci_cp_intc_init();
+ davinci_cp_intc_init(&da850_cp_intc_config);
}
void __init da850_init_time(void)
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 7ad79171b4b5..14e0e1c40611 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -22,7 +22,6 @@
#define DAVINCI_INTC_START NR_IRQS
#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
-void davinci_cp_intc_init(void);
void davinci_timer_init(struct clk *clk);
struct davinci_timer_instance {
diff --git a/include/linux/irqchip/irq-davinci-cp-intc.h b/include/linux/irqchip/irq-davinci-cp-intc.h
index 2270a6167b98..8d71ed5b5a61 100644
--- a/include/linux/irqchip/irq-davinci-cp-intc.h
+++ b/include/linux/irqchip/irq-davinci-cp-intc.h
@@ -20,4 +20,6 @@ struct davinci_cp_intc_config {
unsigned int num_irqs;
};
+int davinci_cp_intc_init(const struct davinci_cp_intc_config *config);
+
#endif /* _LINUX_IRQ_DAVINCI_CP_INTC_ */
--
2.20.1
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next prev parent reply other threads:[~2019-02-08 17:42 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-08 17:34 [PATCH v2 00/33] ARM: davinci: modernize the irq support Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 01/33] ARM: davinci: remove intc_host_map from davinci_soc_info struct Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 02/33] ARM: davinci: aintc: use irq domain Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 03/33] ARM: davinci: select GENERIC_IRQ_MULTI_HANDLER Bartosz Golaszewski
2019-02-09 21:13 ` David Lechner
2019-02-08 17:34 ` [PATCH v2 04/33] ARM: davinci: remove davinci_intc_type Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 05/33] ARM: davinci: pull davinci_intc_base into the respective intc drivers Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 06/33] ARM: davinci: wrap HW interrupt numbers with a macro Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 07/33] ARM: davinci: select SPARSE_IRQ Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 08/33] ARM: davinci: make irqs.h a local header Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 09/33] ARM: davinci: aintc: drop GPL license boilerplate Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 10/33] ARM: davinci: aintc: wrap davinci_irq_init() with a helper Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 11/33] ARM: davinci: aintc: use a common prefix for symbols in the driver Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 12/33] ARM: davinci: aintc: drop the 00 prefix from register offsets Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 13/33] ARM: davinci: aintc: use readl/writel_relaxed() Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 14/33] irqchip: davinci-aintc: add a new config structure Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 15/33] ARM: davinci: aintc: use the new irqchip config structure in dm* SoCs Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 16/33] ARM: davinci: aintc: use the new config structure Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 17/33] ARM: davinci: aintc: move timer-specific irq_set_handler() out of irq.c Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 18/33] ARM: davinci: aintc: remove unnecessary includes Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 19/33] irqchip: davinci-aintc: move the driver to drivers/irqchip Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 20/33] ARM: davinci: cp-intc: remove cp_intc.h Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 21/33] ARM: davinci: cp-intc: add a wrapper around cp_intc_init() Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 22/33] irqchip: davinci-cp-intc: add a new config structure Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 23/33] ARM: davinci: cp-intc: add the new config structures for da8xx SoCs Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 24/33] ARM: davinci: cp-intc: use a common prefix for all symbols Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 25/33] ARM: davinci: cp-intc: convert all hex numbers to lowercase Bartosz Golaszewski
2019-02-08 17:34 ` Bartosz Golaszewski [this message]
2019-02-08 17:34 ` [PATCH v2 27/33] ARM: davinci: cp-intc: improve coding style Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 28/33] ARM: davinci: cp-intc: unify error handling Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 29/33] ARM: davinci: cp-intc: use readl/writel_relaxed() Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 30/33] ARM: davinci: cp-intc: drop GPL license boilerplate Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 31/33] ARM: davinci: cp-intc: remove redundant comments Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 32/33] irqchip: davinci-cp-intc: move the driver to drivers/irqchip Bartosz Golaszewski
2019-02-08 17:34 ` [PATCH v2 33/33] ARM: davinci: remove intc related fields from davinci_soc_info Bartosz Golaszewski
2019-02-08 17:37 ` [PATCH v2 00/33] ARM: davinci: modernize the irq support Bartosz Golaszewski
2019-02-11 11:54 ` Sekhar Nori
2019-02-11 12:11 ` Bartosz Golaszewski
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