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Received: from andrew by vps0.lunn.ch with local (Exim 4.89) (envelope-from ) id 1gtfKs-0007iC-4S; Tue, 12 Feb 2019 22:11:22 +0100 Date: Tue, 12 Feb 2019 22:11:22 +0100 From: Andrew Lunn To: Maxime Chevallier Subject: Re: [PATCH net-next 3/4] net: phy: Extract genphy_c45_pma_read_abilities from marvell10g Message-ID: <20190212211122.GB27170@lunn.ch> References: <20190211142529.22885-1-maxime.chevallier@bootlin.com> <20190211142529.22885-4-maxime.chevallier@bootlin.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190211142529.22885-4-maxime.chevallier@bootlin.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190212_131130_964760_9C2C2852 X-CRM114-Status: GOOD ( 12.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Florian Fainelli , Antoine Tenart , netdev@vger.kernel.org, gregory.clement@bootlin.com, Russell King , linux-kernel@vger.kernel.org, nadavh@marvell.com, thomas.petazzoni@bootlin.com, miquel.raynal@bootlin.com, stefanc@marvell.com, mw@semihalf.com, davem@davemloft.net, linux-arm-kernel@lists.infradead.org, Heiner Kallweit Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Feb 11, 2019 at 03:25:28PM +0100, Maxime Chevallier wrote: > Marvell 10G PHY driver has a generic way of initializing the supported > link modes by reading the PHY's C45 PMA abilities. This can be made > generic, since these registers are part of the 802.3 specifications. > > This commit extracts the config_init link_mode initialization code from > marvell10g and uses it to introduce the genphy_c45_pma_read_abilities > function. > > Only PMA modes are read, it's still up to the caller to set the Pause > parameters. > > Signed-off-by: Maxime Chevallier Reviewed-by: Andrew Lunn > - __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, supported); > - __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, supported); > + __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, phydev->supported); > + __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, phydev->supported); I think someone already pointed out, this is not ideal. The PHY driver should only set pause bits, if it needs odd pause settings because of HW limitations. If no bits are set, the core will set both bits. But this is not a new problem introduced by this patch, so it can be fixed later, rather than hold up this patchset. Andrew _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel