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From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-rockchip@lists.infradead.org,
	Alan Douglas <adouglas@cadence.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 08/15] PCI: endpoint: Fix pci_epf_alloc_space to set correct MEM TYPE flags
Date: Fri, 15 Feb 2019 09:52:21 +0000	[thread overview]
Message-ID: <20190215095214.GA24988@e107981-ln.cambridge.arm.com> (raw)
In-Reply-To: <edc76e9b-bdd4-80bb-3dff-1d44a100c153@ti.com>

On Fri, Feb 15, 2019 at 11:49:12AM +0530, Kishon Vijay Abraham I wrote:
> Hi Lorenzo,
> 
> On 14/02/19 9:59 PM, Lorenzo Pieralisi wrote:
> > On Wed, Feb 13, 2019 at 07:17:14PM +0530, Kishon Vijay Abraham I wrote:
> >> Hi Lorenzo,
> >>
> >> On 11/02/19 11:07 PM, Lorenzo Pieralisi wrote:
> >>> On Mon, Jan 14, 2019 at 04:45:06PM +0530, Kishon Vijay Abraham I wrote:
> >>>> pci_epf_alloc_space() sets the MEM TYPE flags to indicate a 32-bit
> >>>> Base Address Register irrespective of the size. Fix it here to indicate
> >>>> 64-bit BAR if the size is > 2GB.
> >>>>
> >>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> >>>> ---
> >>>>  drivers/pci/endpoint/pci-epf-core.c | 4 +++-
> >>>>  1 file changed, 3 insertions(+), 1 deletion(-)
> >>>
> >>> This looks like a fix and should me marked as such. Does it work
> >>> as as standalone patch if it gets backported ?
> >>
> >> Yeah, it should work. But the current users doesn't allocate > 2GB and some
> >> EPC drivers configure their registers based on size. So nothing is broken
> >> without this patch as such.
> > 
> > I suspect you mean 4GB (here and the commit log), right ? I am checking
> > the commit logs, aiming at merging the patches.
> 
> A 32bit BAR register can support a 'size' of only up to 2GB. Though it
> can hold a memory address of up to 4GB.
> 
> This is also mentioned in the PCI Local Bus Specification.  "A 32-bit
> register can be implemented to support a single memory size that is a
> power of 2 from 16 bytes to 2 GB"

Very true - sorry for the noise.

Lorenz,o

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  reply	other threads:[~2019-02-15  9:52 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-14 11:14 [PATCH v2 00/15] PCI: endpoint: Cleanup EPC features Kishon Vijay Abraham I
2019-01-14 11:14 ` [PATCH v2 01/15] PCI: endpoint: Add new pci_epc_ops to get " Kishon Vijay Abraham I
2019-01-14 11:15 ` [PATCH v2 02/15] PCI: dwc: Add ->get_features() callback function in dw_pcie_ep_ops Kishon Vijay Abraham I
2019-01-14 11:15 ` [PATCH v2 03/15] PCI: designware-plat: Populate ->get_features() dw_pcie_ep_ops Kishon Vijay Abraham I
2019-01-14 11:15 ` [PATCH v2 04/15] PCI: pci-dra7xx: " Kishon Vijay Abraham I
2019-01-14 11:15 ` [PATCH v2 05/15] PCI: rockchip: " Kishon Vijay Abraham I
2019-01-14 11:15 ` [PATCH v2 06/15] PCI: cadence: Populate ->get_features() cdns_pcie_epc_ops Kishon Vijay Abraham I
2019-01-14 11:15 ` [PATCH v2 07/15] PCI: endpoint: Add helper to get first unreserved BAR Kishon Vijay Abraham I
2019-01-14 11:15 ` [PATCH v2 08/15] PCI: endpoint: Fix pci_epf_alloc_space to set correct MEM TYPE flags Kishon Vijay Abraham I
2019-02-11 17:37   ` Lorenzo Pieralisi
2019-02-13 13:47     ` Kishon Vijay Abraham I
2019-02-14 16:29       ` Lorenzo Pieralisi
2019-02-15  6:19         ` Kishon Vijay Abraham I
2019-02-15  9:52           ` Lorenzo Pieralisi [this message]
2019-01-14 11:15 ` [PATCH v2 09/15] PCI: pci-epf-test: Remove setting epf_bar flags in function driver Kishon Vijay Abraham I
2019-01-14 11:15 ` [PATCH v2 10/15] PCI: pci-epf-test: Do not allocate next BARs memory if current BAR is 64Bit Kishon Vijay Abraham I
2019-01-14 11:15 ` [PATCH v2 11/15] PCI: pci-epf-test: Use pci_epc_get_features to get EPC features Kishon Vijay Abraham I
2019-01-14 11:15 ` [PATCH v2 12/15] PCI: cadence: Remove pci_epf_linkup from Cadence EP driver Kishon Vijay Abraham I
2019-01-14 11:15 ` [PATCH v2 13/15] PCI: rockchip: Remove pci_epf_linkup from Rockchip " Kishon Vijay Abraham I
2019-01-14 11:15 ` [PATCH v2 14/15] PCI: designware-plat: Remove setting epc->features in Designware plat " Kishon Vijay Abraham I
2019-01-14 11:15 ` [PATCH v2 15/15] PCI: endpoint: Remove features member in struct pci_epc Kishon Vijay Abraham I
2019-01-15  1:52 ` [PATCH v2 00/15] PCI: endpoint: Cleanup EPC features Shawn Lin
2019-02-11 10:19 ` Gustavo Pimentel
2019-02-11 12:37   ` Kishon Vijay Abraham I
2019-02-15 10:09 ` Lorenzo Pieralisi

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