From: Julien Grall <julien.grall@arm.com>
To: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu
Cc: suzuki.poulose@arm.com, marc.zyngier@arm.com,
catalin.marinas@arm.com, julien.thierry@arm.com,
will.deacon@arm.com, christoffer.dall@arm.com,
Julien Grall <julien.gralL@arm.com>,
james.morse@arm.com
Subject: [PATCH RFC 04/14] arm64/mm: Move the variable lock and tlb_flush_pending to asid_info
Date: Thu, 21 Mar 2019 16:36:13 +0000 [thread overview]
Message-ID: <20190321163623.20219-5-julien.grall@arm.com> (raw)
In-Reply-To: <20190321163623.20219-1-julien.grall@arm.com>
The variables lock and tlb_flush_pending holds information for a given
ASID allocator. So move them to the asid_info structure.
Signed-off-by: Julien Grall <julien.gralL@arm.com>
---
arch/arm64/mm/context.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
index da17ed6c7117..e98ab348b9cb 100644
--- a/arch/arm64/mm/context.c
+++ b/arch/arm64/mm/context.c
@@ -27,8 +27,6 @@
#include <asm/smp.h>
#include <asm/tlbflush.h>
-static DEFINE_RAW_SPINLOCK(cpu_asid_lock);
-
struct asid_info
{
atomic64_t generation;
@@ -36,6 +34,9 @@ struct asid_info
atomic64_t __percpu *active;
u64 __percpu *reserved;
u32 bits;
+ raw_spinlock_t lock;
+ /* Which CPU requires context flush on next call */
+ cpumask_t flush_pending;
} asid_info;
#define active_asid(info, cpu) *per_cpu_ptr((info)->active, cpu)
@@ -44,8 +45,6 @@ struct asid_info
static DEFINE_PER_CPU(atomic64_t, active_asids);
static DEFINE_PER_CPU(u64, reserved_asids);
-static cpumask_t tlb_flush_pending;
-
#define ASID_MASK(info) (~GENMASK((info)->bits - 1, 0))
#define ASID_FIRST_VERSION(info) (1UL << ((info)->bits))
@@ -124,7 +123,7 @@ static void flush_context(struct asid_info *info)
* Queue a TLB invalidation for each CPU to perform on next
* context-switch
*/
- cpumask_setall(&tlb_flush_pending);
+ cpumask_setall(&info->flush_pending);
}
static bool check_update_reserved_asid(struct asid_info *info, u64 asid,
@@ -233,7 +232,7 @@ void check_and_switch_context(struct mm_struct *mm, unsigned int cpu)
old_active_asid, asid))
goto switch_mm_fastpath;
- raw_spin_lock_irqsave(&cpu_asid_lock, flags);
+ raw_spin_lock_irqsave(&info->lock, flags);
/* Check that our ASID belongs to the current generation. */
asid = atomic64_read(&mm->context.id);
if ((asid ^ atomic64_read(&info->generation)) >> info->bits) {
@@ -241,11 +240,11 @@ void check_and_switch_context(struct mm_struct *mm, unsigned int cpu)
atomic64_set(&mm->context.id, asid);
}
- if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending))
+ if (cpumask_test_and_clear_cpu(cpu, &info->flush_pending))
local_flush_tlb_all();
atomic64_set(&active_asid(info, cpu), asid);
- raw_spin_unlock_irqrestore(&cpu_asid_lock, flags);
+ raw_spin_unlock_irqrestore(&info->lock, flags);
switch_mm_fastpath:
@@ -288,6 +287,8 @@ static int asids_init(void)
info->active = &active_asids;
info->reserved = &reserved_asids;
+ raw_spin_lock_init(&info->lock);
+
pr_info("ASID allocator initialised with %lu entries\n",
NUM_USER_ASIDS(info));
return 0;
--
2.11.0
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next prev parent reply other threads:[~2019-03-21 16:53 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-21 16:36 [PATCH RFC 00/14] kvm/arm: Align the VMID allocation with the arm64 ASID one Julien Grall
2019-03-21 16:36 ` [PATCH RFC 01/14] arm64/mm: Introduce asid_info structure and move asid_generation/asid_map to it Julien Grall
2019-03-21 17:03 ` Suzuki K Poulose
2019-03-21 17:27 ` Julien Grall
2019-03-21 16:36 ` [PATCH RFC 02/14] arm64/mm: Move active_asids and reserved_asids to asid_info Julien Grall
2019-03-21 16:36 ` [PATCH RFC 03/14] arm64/mm: Move bits " Julien Grall
2019-03-21 16:36 ` Julien Grall [this message]
2019-03-21 16:36 ` [PATCH RFC 05/14] arm64/mm: Remove dependency on MM in new_context Julien Grall
2019-03-21 16:36 ` [PATCH RFC 06/14] arm64/mm: Store the number of asid allocated per context Julien Grall
2019-03-21 16:36 ` [PATCH RFC 07/14] arm64/mm: Introduce NUM_ASIDS Julien Grall
2019-03-21 16:36 ` [PATCH RFC 08/14] arm64/mm: Split asid_inits in 2 parts Julien Grall
2019-03-21 16:36 ` [PATCH RFC 09/14] arm64/mm: Split the function check_and_switch_context in 3 parts Julien Grall
2019-03-21 16:36 ` [PATCH RFC 10/14] arm64/mm: Introduce a callback to flush the local context Julien Grall
2019-03-21 16:36 ` [PATCH RFC 11/14] arm64: Move the ASID allocator code in a separate file Julien Grall
2019-06-05 16:56 ` Julien Grall
2019-06-05 20:41 ` Palmer Dabbelt
2019-06-11 1:56 ` Gary Guo
2019-06-19 8:07 ` Guo Ren
2019-06-19 8:54 ` Julien Grall
2019-06-19 9:12 ` Will Deacon
2019-06-19 12:18 ` Guo Ren
2019-06-19 12:39 ` Will Deacon
2019-06-20 9:33 ` Guo Ren
2019-06-24 10:40 ` Will Deacon
2019-06-25 7:25 ` Palmer Dabbelt
2019-09-07 23:52 ` Guo Ren
2019-09-12 14:02 ` Will Deacon
2019-09-12 14:59 ` Guo Ren
[not found] ` <CAJF2gTTsHCsSpf1ncVb=ZJS2d=r+AdDi2=5z-REVS=uUg9138A@mail.gmail.com>
2019-09-14 8:49 ` Guo Ren
2019-09-16 12:57 ` Jean-Philippe Brucker
2019-09-19 13:07 ` Guo Ren
2019-09-19 15:18 ` Jean-Philippe Brucker
2019-09-20 0:07 ` Guo Ren
2019-09-20 7:18 ` Jean-Philippe Brucker
2019-09-14 14:01 ` Palmer Dabbelt
2019-09-15 5:03 ` Anup Patel
2019-09-16 18:18 ` Will Deacon
2019-09-16 18:28 ` Palmer Dabbelt
2019-09-17 3:42 ` Anup Patel
2019-09-19 13:36 ` Guo Ren
2019-06-19 11:51 ` Guo Ren
2019-06-19 12:52 ` Julien Grall
2019-06-21 14:16 ` Catalin Marinas
2019-06-23 16:35 ` Guo Ren
2019-06-24 10:22 ` Will Deacon
2019-06-27 9:41 ` qi.fuli
2019-06-27 10:26 ` Will Deacon
2019-06-24 15:38 ` Catalin Marinas
2019-06-30 4:29 ` Guo Ren
2019-07-01 9:17 ` Catalin Marinas
2019-07-16 3:31 ` Guo Ren
2019-07-22 16:38 ` Catalin Marinas
2019-03-21 16:36 ` [PATCH RFC 12/14] arm64/lib: asid: Allow user to update the context under the lock Julien Grall
2019-03-21 16:36 ` [PATCH RFC 13/14] arm/kvm: Introduce a new VMID allocator Julien Grall
2019-03-21 16:36 ` [PATCH RFC 14/14] kvm/arm: Align the VMID allocation with the arm64 ASID one Julien Grall
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