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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id h8sm11997455pfo.149.2019.03.26.09.29.31 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 26 Mar 2019 09:29:31 -0700 (PDT) Date: Tue, 26 Mar 2019 10:29:29 -0600 From: Mathieu Poirier To: Suzuki K Poulose Subject: Re: [PATCH v2 11/16] coresight: tmc-etr: Refactor function tmc_etr_setup_perf_buf() Message-ID: <20190326162929.GA25410@xps15> References: <20190325215632.17013-1-mathieu.poirier@linaro.org> <20190325215632.17013-12-mathieu.poirier@linaro.org> <216da3b1-217d-4b89-b027-854f49e3b824@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <216da3b1-217d-4b89-b027-854f49e3b824@arm.com> User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190326_092933_817042_371B2F1A X-CRM114-Status: GOOD ( 20.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alexander.shishkin@linux.intel.com, coresight@lists.linaro.org, peterz@infradead.org, Mike.Leach@arm.com, leo.yan@linaro.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Mar 26, 2019 at 03:29:03PM +0000, Suzuki K Poulose wrote: > On 03/25/2019 09:56 PM, Mathieu Poirier wrote: > > Refactoring function tmc_etr_setup_perf_buf() so that it only deals > > with the high level etr_perf_buffer, and leaving the allocation of the > > backend buffer (i.e etr_buf) to another function. > > > > That way the backend buffer allocation function can decide if it wants > > to reuse an existing buffer (CPU-wide trace scenarios) or simply create > > a new one. > > > > Signed-off-by: Mathieu Poirier > > Looks good to me, except for one minor nit: > > > > --- > > .../hwtracing/coresight/coresight-tmc-etr.c | 46 +++++++++++++------ > > 1 file changed, 31 insertions(+), 15 deletions(-) > > > > diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c > > index 6e2c2aa130d5..79fee9341446 100644 > > --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c > > +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c > > @@ -1159,25 +1159,13 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) > > return ret; > > } > > -/* > > - * tmc_etr_setup_perf_buf: Allocate ETR buffer for use by perf. > > - * The size of the hardware buffer is dependent on the size configured > > - * via sysfs and the perf ring buffer size. We prefer to allocate the > > - * largest possible size, scaling down the size by half until it > > - * reaches a minimum limit (1M), beyond which we give up. > > - */ > > -static struct etr_perf_buffer * > > -tmc_etr_setup_perf_buf(struct tmc_drvdata *drvdata, int node, int nr_pages, > > - void **pages, bool snapshot) > > +static struct etr_buf * > > +tmc_etr_get_etr_buf(struct tmc_drvdata *drvdata, int node, > > + int nr_pages, void **pages) > > nit: The name tmc_etr_get_etr_buf() sounds too generic and has nothing > to do with the perf. It would be good to make it explicit that it is for > perf session. > > May be, tmc_etr_perf_get_etr_buf() ? or may be even, simply > get_perf_etr_buf(). I don't have a strong preference here, the latter looks fine to me. > > Otherwise, > > Reviewed-by: Suzuki K Poulose Ok _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel