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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hCQFp-0001jt-K1; Fri, 05 Apr 2019 14:55:41 +0000 Received: from relay5-d.mail.gandi.net ([217.70.183.197]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hCQFm-0001iz-BW for linux-arm-kernel@lists.infradead.org; Fri, 05 Apr 2019 14:55:40 +0000 X-Originating-IP: 90.88.30.125 Received: from localhost (aaubervilliers-681-1-89-125.w90-88.abo.wanadoo.fr [90.88.30.125]) (Authenticated sender: maxime.ripard@bootlin.com) by relay5-d.mail.gandi.net (Postfix) with ESMTPSA id AF5071C0008; Fri, 5 Apr 2019 14:55:32 +0000 (UTC) Date: Fri, 5 Apr 2019 16:55:32 +0200 From: Maxime Ripard To: Yangtao Li Subject: Re: [PATCH 2/2] dt-bindings: cpufreq: Document operating-points-v2-sunxi-cpu Message-ID: <20190405145532.cstvbv3mxbzrmpxp@flea> References: <20190405102455.15311-1-tiny.windzz@gmail.com> <20190405102455.15311-3-tiny.windzz@gmail.com> MIME-Version: 1.0 In-Reply-To: <20190405102455.15311-3-tiny.windzz@gmail.com> User-Agent: NeoMutt/20180716 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190405_075538_689816_7F153E08 X-CRM114-Status: GOOD ( 22.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nm@ti.com, mark.rutland@arm.com, linux-pm@vger.kernel.org, sboyd@kernel.org, vireshk@kernel.org, rjw@rjwysocki.net, linux-kernel@vger.kernel.org, wens@csie.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, gregkh@linuxfoundation.org, mchehab+samsung@kernel.org, davem@davemloft.net, devicetree@vger.kernel.org Content-Type: multipart/mixed; boundary="===============5267795699306334252==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============5267795699306334252== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="oc2gi2ozpuz2hvkv" Content-Disposition: inline --oc2gi2ozpuz2hvkv Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi, On Fri, Apr 05, 2019 at 06:24:55AM -0400, Yangtao Li wrote: > Allwinner Process Voltage Scaling Tables defines the voltage and > frequency value based on the speedbin blown in the efuse combination. > The sunxi-cpufreq-nvmem driver reads the efuse value from the SoC to > provide the OPP framework with required information. > This is used to determine the voltage and frequency value for each > OPP of operating-points-v2 table when it is parsed by the OPP framework. > > This change adds documentation for the DT bindings. > The "operating-points-v2-sunxi-cpu" DT extends the "operating-points-v2" > with following parameters: > - nvmem-cells (NVMEM area containig the speedbin information) > - opp-supported-hw: A single 32 bit bitmap value, > representing compatible HW: > 0: speedbin 0 > 1: speedbin 1 > 2: speedbin 2 > 3-31: unused > > Signed-off-by: Yangtao Li > --- > .../bindings/opp/sunxi-nvmem-cpufreq.txt | 235 ++++++++++++++++++ > 1 file changed, 235 insertions(+) > create mode 100644 Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt > > diff --git a/Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt b/Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt > new file mode 100644 > index 000000000000..80201d4e5147 > --- /dev/null > +++ b/Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt > @@ -0,0 +1,235 @@ > +Allwinner Technologies, Inc. NVMEM CPUFreq and OPP bindings > +=================================== > + > +For some SoCs, the CPU frequency subset and voltage value of each OPP > +varies based on the silicon variant in use. Allwinner Process Voltage > +Scaling Tables defines the voltage and frequency value based on the > +speedbin blown in the efuse combination. The sunxi-cpufreq-nvmem driver > +reads the efuse value from the SoC to provide the OPP framework with > +required information. > + > +Required properties: > +-------------------- > +In 'cpus' nodes: > +- operating-points-v2: Phandle to the operating-points-v2 table to use. > + > +In 'operating-points-v2' table: > +- compatible: Should be > + - 'operating-points-v2-sunxi-cpu'. > +- nvmem-cells: A phandle pointing to a nvmem-cells node representing the > + efuse registers that has information about the > + speedbin that is used to select the right frequency/voltage > + value pair. > + Please refer the for nvmem-cells > + bindings Documentation/devicetree/bindings/nvmem/nvmem.txt > + and also examples below. > + > +In every OPP node: > +- opp-supported-hw: A single 32 bit bitmap value, representing compatible HW. > + Bitmap: > + 0: speedbin 0 > + 1: speedbin 1 > + 2: speedbin 2 > + 3-31: unused I'm wondering if that's the right approach. I guess we could also have three different OPP tables, and pass them all three through a phandle array, and have the kernel code select which one is relevant based on the SID content Another option would be to use the OF_DYNAMIC code to fill operating-points-v2 at kernel boot, before (or when) cpufreq kicks in. ATF could also do that work. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --oc2gi2ozpuz2hvkv Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXKdsZAAKCRDj7w1vZxhR xVEsAQCXg2FeX4Go02z6Dxj2tdoeCR2wkl5QACmJ0aFB02r/vQEA5pPZGmheX74N k69PxJJ0pP8WhjoBRd4QLyifeKPolQE= =Q1iD -----END PGP SIGNATURE----- --oc2gi2ozpuz2hvkv-- --===============5267795699306334252== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============5267795699306334252==--