From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS, T_TVD_FUZZY_SECURITIES,URIBL_BLOCKED,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6BB55C10F0E for ; Thu, 18 Apr 2019 14:43:48 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3AA35206B6 for ; Thu, 18 Apr 2019 14:43:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="R4V9w3GL" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3AA35206B6 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Z8Dcd/Elv1elkXUfT9k5AbELPc+H2HyRjFG3X3bEDco=; b=R4V9w3GLRXy16Z 2wHNrNUrK+1kPqwI8CPibN+SuVToqOhFw8NV/sq8xU3YZaU3oDJXHZnQY5NG7hQNOk8+kMLJlkYuF rutA2LDUmmszd7z8Y1I2j2Sqvk1cYYKNUgPTV59Zc2zmuJ5G01NU/uatKt4eqr7mXrOm5bwoC7Hjr PyNLP8ACpiGB5QKkDgmRZwjyw8wp2JHnmMTgdv7yuJjwAYl0gX6J7JM0/9A65Jd1YViJctzz3rTq8 mPJuR9kS6962IzyN4f/98Ldy+jh34XnsJM5RHldMCQq73Ex0NKSNVRgDouopMOvgEzuVmOaCpNYJh UvGlWXGaqhC6MmDX18nQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hH8GM-000462-OQ; Thu, 18 Apr 2019 14:43:42 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hH8GI-00045Q-SH for linux-arm-kernel@lists.infradead.org; Thu, 18 Apr 2019 14:43:40 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 22D5115AB; Thu, 18 Apr 2019 07:43:36 -0700 (PDT) Received: from e107155-lin (e107155-lin.cambridge.arm.com [10.1.196.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0BC083F5AF; Thu, 18 Apr 2019 07:43:32 -0700 (PDT) Date: Thu, 18 Apr 2019 15:43:30 +0100 From: Sudeep Holla To: Leonard Crestez Subject: Re: [PATCH 0/3] Add power domain driver support for i.mx8m family Message-ID: <20190418144330.GD7770@e107155-lin> References: <20190417053211.2195-1-ping.bai@nxp.com> <1555503195.2317.19.camel@pengutronix.de> <68aaace3-f66e-b4b8-30a0-57b8b66a7524@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190418_074338_928551_CAE3E0A8 X-CRM114-Status: GOOD ( 31.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aisheng Dong , "mark.rutland@arm.com" , Peng Fan , Souvik Chakravarty , Jacky Bai , "devicetree@vger.kernel.org" , "festevam@gmail.com" , "s.hauer@pengutronix.de" , Sudeep Holla , =?iso-8859-1?Q?Cl=E9ment?= Faure , "robh+dt@kernel.org" , dl-linux-imx , "kernel@pengutronix.de" , Andre Przywara , Silvano Di Ninno , "shawnguo@kernel.org" , "linux-arm-kernel@lists.infradead.org" , Lucas Stach Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Apr 17, 2019 at 04:21:55PM +0000, Leonard Crestez wrote: > On 4/17/2019 4:33 PM, Sudeep Holla wrote: > >>> I don't yet buy the security argument. There are many more shared parts > >>> on the SoC, like the clock controller, that would need to be taken away > >>> from the non-secure world if one would want to run an untrusted OS > >>> kernel on a i.MX8M system. > >>> > >>> To properly implement security on any i.MX8M based system the firmware > >>> would need to grow something like a full ARM SCPI implementation, so > >>> all shared critical peripherals are solely under firmware control. > >> > >> It might be possible to rework this to use some form of SCMI-over-SMC > >> instead of vendor-specific SMCCC SIP calls > > > > Sounds feasible and good if all the custom IDs/calls/..etc are well > > hidden in the firmware(TF-A in this case) behind the existing > > abstraction in Linux kernel. > > >> Hiding everything critical for security (especially CCM) behind a SCMI > >> interface would be a large amount of work but introducing SCMI > >> incrementally (starting with imx8mm power) would be useful by itself > >> because it simplifies OS implementation. > > > > Agreed, but not at the expense of introducing and maintaining *random* > > *one-off* *custom* SMC extensions. Sorry, that's not open to debate. > > > >> Many at NXP have attempted to evaluate SCMI and their conclusion has > >> always been that "many extensions are required". > > > > I would like to hear the evaluation. Don't assume that you need to > > implement something similar to ARM SCMI reference design. All OSPM like > > Linux kernel cares is conformance to the interface, what/how you > > implement on the other side is left to you. > > Brief summary from some attempts at nudging NXP devs towards SCMI: > Thanks for providing the evaluation details. > > There is no SCMI-over-SMC support specified? This would make it possible > to use SCMI as a purely software solution on platforms which did not > take SCMI into account at hardware design time or which don't have a > dedicated SCP inside the SOC. This applies to all imx. > While I admit, the section of SCMI specification that touches transport is quite lean, I would view it as done intentionally as the specification is mainly concentrated on it's subject matter which is protocol and not the transport itself. So did the evaluation attempted to consider/try SMC as transport retaining protocol as is ? I can't see any issues with that and hence I am asking it loud here. > Peng has been looking at some out-of-tree arm-smc-mailbox patches so > it's not just NXP which would like the option of implementing SCMI > vendor side in ATF. Like this: https://lwn.net/Articles/726861/ > OK, any inputs from that study ? > Blessing SCMI-over-SMC would allow stuff like intercepting a SCMI > message in EL2; checking if the guest is allowed to use that resource > and then either forward to EL3 or return an error. > Why are you mixing virtualisation and EL2 here ? Yes we need them but it should be optional and if a platform doesn't need it, it should be possible to skip it. > > SCMI clock protocol does not cover muxes? On imx the clk hierarchy is > very intricate and it relies on many clk core features (including > notifiers) and occasional assigned-clocks-parents properties to control > muxes from linux. Moving all that to firmware would be a huge amount of > effort. > Yes it may be huge amount of work. But is it completely safe as claimed ? Giving access to mux controls in OSPM is no so safe/secure in the modern world. So you either make it safe with that extra huge effort needed or just keep everything in OSPM. But IMO anything in between is not worth it. > If SCMI included a generic clk mux and allowed keeping the clk hierarchy > inside linux then the effort required for hiding the CCM would still be > large, but more approachable. It would not "simplify the rich OS" but it > would still improve security. > Why do you need to keep the clk hierarchy in Linux ? > > Last point is that SCMI does not cover pinctrl? This is a large chunk of > firmware functionality on some imx and security control over individual > pins is desirable. > Yes but is that something available at runtime ? Can't that be one-off firmware setting. Will Linux need to configure it differently on each boot ? Just trying to understand. You say security control here and is it really safe to give OS access to control those ? In short, if you had a full blown protocol like few other platforms, the push back would have been minimal. Instead, i.MX chose to implement a solution which doesn't have a design thought before and custom SMC APIs added on fly whenever a new request is raised by OSPM to control things that it thinks it should. I am sure, the very next platform will have it's own set of requirements and custom SMC APIs/interface and no one has even bothered about long term maintenance of these. So assuming that trend, I would NACK this as it stands. -- Regards, Sudeep _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel