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From: Chen-Yu Tsai <wens@kernel.org>
To: Maxime Ripard <maxime.ripard@bootlin.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>
Cc: Chen-Yu Tsai <wens@csie.org>,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 24/25] clk: sunxi-ng: a80-usb: Use local parent references for SUNXI_CCU_GATE
Date: Mon, 20 May 2019 16:04:20 +0800	[thread overview]
Message-ID: <20190520080421.12575-25-wens@kernel.org> (raw)
In-Reply-To: <20190520080421.12575-1-wens@kernel.org>

From: Chen-Yu Tsai <wens@csie.org>

With the new clk parenting code and SUNXI_CCU_GATE macros, we can
reference parents locally via pointers to struct clk_hw or DT
clock-names.

Convert existing SUNXI_CCU_GATE definitions to SUNXI_CCU_GATE_DATA to
specify the parent clock.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.c | 32 +++++++++++++++---------
 1 file changed, 20 insertions(+), 12 deletions(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.c b/drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.c
index 1d76f24f7df3..23bc11e65539 100644
--- a/drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.c
+++ b/drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.c
@@ -22,18 +22,26 @@
 
 #include "ccu-sun9i-a80-usb.h"
 
-static SUNXI_CCU_GATE(bus_hci0_clk, "bus-hci0", "bus-usb", 0x0, BIT(1), 0);
-static SUNXI_CCU_GATE(usb_ohci0_clk, "usb-ohci0", "osc24M", 0x0, BIT(2), 0);
-static SUNXI_CCU_GATE(bus_hci1_clk, "bus-hci1", "bus-usb", 0x0, BIT(3), 0);
-static SUNXI_CCU_GATE(bus_hci2_clk, "bus-hci2", "bus-usb", 0x0, BIT(5), 0);
-static SUNXI_CCU_GATE(usb_ohci2_clk, "usb-ohci2", "osc24M", 0x0, BIT(6), 0);
-
-static SUNXI_CCU_GATE(usb0_phy_clk, "usb0-phy", "osc24M", 0x4, BIT(1), 0);
-static SUNXI_CCU_GATE(usb1_hsic_clk, "usb1-hsic", "osc24M", 0x4, BIT(2), 0);
-static SUNXI_CCU_GATE(usb1_phy_clk, "usb1-phy", "osc24M", 0x4, BIT(3), 0);
-static SUNXI_CCU_GATE(usb2_hsic_clk, "usb2-hsic", "osc24M", 0x4, BIT(4), 0);
-static SUNXI_CCU_GATE(usb2_phy_clk, "usb2-phy", "osc24M", 0x4, BIT(5), 0);
-static SUNXI_CCU_GATE(usb_hsic_clk, "usb-hsic", "osc24M", 0x4, BIT(10), 0);
+static const struct clk_parent_data clk_parent_hosc[] = {
+	{ .fw_name = "hosc" },
+};
+
+static const struct clk_parent_data clk_parent_bus[] = {
+	{ .fw_name = "bus" },
+};
+
+static SUNXI_CCU_GATE_DATA(bus_hci0_clk, "bus-hci0", clk_parent_bus, 0x0, BIT(1), 0);
+static SUNXI_CCU_GATE_DATA(usb_ohci0_clk, "usb-ohci0", clk_parent_hosc, 0x0, BIT(2), 0);
+static SUNXI_CCU_GATE_DATA(bus_hci1_clk, "bus-hci1", clk_parent_bus, 0x0, BIT(3), 0);
+static SUNXI_CCU_GATE_DATA(bus_hci2_clk, "bus-hci2", clk_parent_bus, 0x0, BIT(5), 0);
+static SUNXI_CCU_GATE_DATA(usb_ohci2_clk, "usb-ohci2", clk_parent_hosc, 0x0, BIT(6), 0);
+
+static SUNXI_CCU_GATE_DATA(usb0_phy_clk, "usb0-phy", clk_parent_hosc, 0x4, BIT(1), 0);
+static SUNXI_CCU_GATE_DATA(usb1_hsic_clk, "usb1-hsic", clk_parent_hosc, 0x4, BIT(2), 0);
+static SUNXI_CCU_GATE_DATA(usb1_phy_clk, "usb1-phy", clk_parent_hosc, 0x4, BIT(3), 0);
+static SUNXI_CCU_GATE_DATA(usb2_hsic_clk, "usb2-hsic", clk_parent_hosc, 0x4, BIT(4), 0);
+static SUNXI_CCU_GATE_DATA(usb2_phy_clk, "usb2-phy", clk_parent_hosc, 0x4, BIT(5), 0);
+static SUNXI_CCU_GATE_DATA(usb_hsic_clk, "usb-hsic", clk_parent_hosc, 0x4, BIT(10), 0);
 
 static struct ccu_common *sun9i_a80_usb_clks[] = {
 	&bus_hci0_clk.common,
-- 
2.20.1


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  parent reply	other threads:[~2019-05-20  8:08 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-20  8:03 [PATCH 00/25] clk: sunxi-ng: clk parent rewrite part 1 Chen-Yu Tsai
2019-05-20  8:03 ` [PATCH 01/25] clk: Fix debugfs clk_possible_parents for clks without parent string names Chen-Yu Tsai
2019-06-07 18:14   ` Stephen Boyd
2019-05-20  8:03 ` [PATCH 02/25] clk: Add CLK_HW_INIT_* macros using .parent_hws Chen-Yu Tsai
2019-06-07 18:17   ` Stephen Boyd
2019-05-20  8:03 ` [PATCH 03/25] clk: Add CLK_HW_INIT_FW_NAME macro using .fw_name in .parent_data Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 04/25] clk: Add CLK_HW_INIT_PARENT_DATA macro using .parent_data Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 05/25] clk: fixed-factor: Add CLK_FIXED_FACTOR_HW which takes clk_hw pointer as parent Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 06/25] clk: fixed-factor: Add CLK_FIXED_FACTOR_HWS which takes list of struct clk_hw * Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 07/25] clk: fixed-factor: Add CLK_FIXED_FACTOR_FW_NAME for DT clock-names parent Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 08/25] clk: sunxi-ng: switch to of_clk_hw_register() for registering clks Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 09/25] clk: sunxi-ng: sun8i-r: Use local parent references for CLK_HW_INIT_* Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 10/25] clk: sunxi-ng: a10: Use local parent references for CLK_FIXED_FACTOR Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 11/25] clk: sunxi-ng: sun5i: " Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 12/25] clk: sunxi-ng: a31: " Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 13/25] clk: sunxi-ng: a23: " Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 14/25] clk: sunxi-ng: a33: " Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 15/25] clk: sunxi-ng: h3: " Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 16/25] clk: sunxi-ng: r40: " Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 17/25] clk: sunxi-ng: v3s: " Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 18/25] clk: sunxi-ng: sun8i-r: " Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 19/25] clk: sunxi-ng: f1c100s: " Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 20/25] clk: sunxi-ng: a64: " Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 21/25] clk: sunxi-ng: h6: " Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 22/25] clk: sunxi-ng: h6-r: " Chen-Yu Tsai
2019-05-20  8:04 ` [PATCH 23/25] clk: sunxi-ng: gate: Add macros for referencing local clock parents Chen-Yu Tsai
2019-05-20  8:04 ` Chen-Yu Tsai [this message]
2019-05-20  8:04 ` [PATCH 25/25] clk: sunxi-ng: sun8i-r: Use local parent references for SUNXI_CCU_GATE Chen-Yu Tsai
2019-05-20  9:03 ` [PATCH 00/25] clk: sunxi-ng: clk parent rewrite part 1 Maxime Ripard
2019-06-03 16:38   ` Chen-Yu Tsai
2019-06-07 18:46     ` Stephen Boyd
2019-06-11  5:34       ` Chen-Yu Tsai

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