From: Tony Lindgren <tony@atomide.com>
To: linux-omap@vger.kernel.org
Cc: Nishanth Menon <nm@ti.com>, Tero Kristo <t-kristo@ti.com>,
Dave Gerlach <d-gerlach@ti.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-kernel@vger.kernel.org,
Peter Ujfalusi <peter.ujfalusi@ti.com>,
devicetree@vger.kernel.org, Faiz Abbas <faiz_abbas@ti.com>,
Keerthy <j-keerthy@ti.com>, Suman Anna <s-anna@ti.com>,
Rob Herring <robh@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Roger Quadros <rogerq@ti.com>
Subject: [PATCH 04/12] bus: ti-sysc: Enable interconnect target module autoidle bit on enable
Date: Mon, 27 May 2019 05:13:40 -0700 [thread overview]
Message-ID: <20190527121348.45251-5-tony@atomide.com> (raw)
In-Reply-To: <20190527121348.45251-1-tony@atomide.com>
For interconnect target modules with autoidle bit wired, we need to manage
it for enable and disable.
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
drivers/bus/ti-sysc.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -879,7 +879,7 @@ static int sysc_enable_module(struct device *dev)
/* Set MIDLE mode */
idlemodes = ddata->cfg.midlemodes;
if (!idlemodes || regbits->midle_shift < 0)
- return 0;
+ goto set_autoidle;
best_mode = fls(ddata->cfg.midlemodes) - 1;
if (best_mode > SYSC_IDLE_MASK) {
@@ -891,6 +891,14 @@ static int sysc_enable_module(struct device *dev)
reg |= best_mode << regbits->midle_shift;
sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
+set_autoidle:
+ /* Autoidle bit must enabled separately if available */
+ if (regbits->autoidle_shift >= 0 &&
+ ddata->cfg.sysc_val & BIT(regbits->autoidle_shift)) {
+ reg |= 1 << regbits->autoidle_shift;
+ sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
+ }
+
return 0;
}
@@ -952,6 +960,9 @@ static int sysc_disable_module(struct device *dev)
reg &= ~(SYSC_IDLE_MASK << regbits->sidle_shift);
reg |= best_mode << regbits->sidle_shift;
+ if (regbits->autoidle_shift >= 0 &&
+ ddata->cfg.sysc_val & BIT(regbits->autoidle_shift))
+ reg |= 1 << regbits->autoidle_shift;
sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
return 0;
--
2.21.0
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next prev parent reply other threads:[~2019-05-27 12:15 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-27 12:13 [PATCH 00/12] ti-sysc driver changes to drop custom hwmods property Tony Lindgren
2019-05-27 12:13 ` [PATCH 01/12] bus: ti-sysc: Support 16-bit writes too Tony Lindgren
2019-05-28 11:06 ` David Laight
2019-05-28 12:27 ` Tony Lindgren
2019-05-27 12:13 ` [PATCH 02/12] bus: ti-sysc: Make OCP reset work for sysstatus and sysconfig reset bits Tony Lindgren
2019-05-27 12:13 ` [PATCH 03/12] bus: ti-sysc: Allow QUIRK_LEGACY_IDLE even if legacy_mode is not set Tony Lindgren
2019-05-27 12:13 ` Tony Lindgren [this message]
2019-05-27 12:13 ` [PATCH 05/12] bus: ti-sysc: Handle clockactivity for enable and disable Tony Lindgren
2019-05-27 12:13 ` [PATCH 06/12] bus: ti-sysc: Handle swsup idle mode quirks Tony Lindgren
2019-05-27 12:13 ` [PATCH 07/12] bus: ti-sysc: Set ENAWAKEUP if available Tony Lindgren
2019-05-27 12:13 ` [PATCH 08/12] bus: ti-sysc: Add support for disabling module without legacy mode Tony Lindgren
2019-05-27 12:13 ` [PATCH 09/12] bus: ti-sysc: Do rstctrl reset handling in two phases Tony Lindgren
2019-05-27 12:13 ` [PATCH 10/12] bus: ti-sysc: Detect uarts also on omap34xx Tony Lindgren
2019-05-27 12:13 ` [PATCH 11/12] ARM: dts: Drop legacy custom hwmods property for omap4 uart Tony Lindgren
2019-05-27 12:13 ` [PATCH 12/12] ARM: dts: Drop legacy custom hwmods property for omap4 mmc Tony Lindgren
2019-05-28 0:58 ` [PATCH 00/12] ti-sysc driver changes to drop custom hwmods property Keerthy
2019-05-28 6:16 ` Tony Lindgren
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