* [PATCH 1/6] arm64: dts: k3-am6: Add "socionext, synquacer-pre-its" property to gic_its
2019-05-29 9:18 [PATCH 0/6] AM654: Add PCIe and SERDES DT nodes Kishon Vijay Abraham I
@ 2019-05-29 9:18 ` Kishon Vijay Abraham I
2019-05-29 9:18 ` [PATCH 2/6] arm64: dts: k3-am6: Add mux-controller DT node required for muxing SERDES Kishon Vijay Abraham I
` (5 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Kishon Vijay Abraham I @ 2019-05-29 9:18 UTC (permalink / raw)
To: Tero Kristo, Nishanth Menon
Cc: Mark Rutland, devicetree, linux-kernel, Kishon Vijay Abraham I,
Rob Herring, linux-arm-kernel
GIC_ITS used in AM654 platform has the same configuration as that of
GIC_ITS used in Socionext SoCs. Add "socionext,synquacer-pre-its"
property to get PCI MSI working.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 752455269fab..81e97d7adcc9 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -44,6 +44,7 @@
gic_its: gic-its@18200000 {
compatible = "arm,gic-v3-its";
reg = <0x00 0x01820000 0x00 0x10000>;
+ socionext,synquacer-pre-its = <0x1000000 0x400000>;
msi-controller;
#msi-cells = <1>;
};
--
2.17.1
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^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 2/6] arm64: dts: k3-am6: Add mux-controller DT node required for muxing SERDES
2019-05-29 9:18 [PATCH 0/6] AM654: Add PCIe and SERDES DT nodes Kishon Vijay Abraham I
2019-05-29 9:18 ` [PATCH 1/6] arm64: dts: k3-am6: Add "socionext, synquacer-pre-its" property to gic_its Kishon Vijay Abraham I
@ 2019-05-29 9:18 ` Kishon Vijay Abraham I
2019-05-29 9:18 ` [PATCH 3/6] arm64: dts: k3-am6: Add SERDES DT node Kishon Vijay Abraham I
` (4 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Kishon Vijay Abraham I @ 2019-05-29 9:18 UTC (permalink / raw)
To: Tero Kristo, Nishanth Menon
Cc: Mark Rutland, devicetree, linux-kernel, Kishon Vijay Abraham I,
Rob Herring, linux-arm-kernel
Add mux-controller DT node as a child node of scm_conf. This is
required for muxing SERDES between USB, PCIe and ICSS2 SGMII.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 81e97d7adcc9..99d2402455d1 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -233,6 +233,13 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x00100000 0x1c000>;
+
+ serdes_mux: mux-controller {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x4080 0x3>, /* SERDES0 lane select */
+ <0x4090 0x3>; /* SERDES1 lane select */
+ };
};
dwc3_0: dwc3@4000000 {
--
2.17.1
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^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 3/6] arm64: dts: k3-am6: Add SERDES DT node
2019-05-29 9:18 [PATCH 0/6] AM654: Add PCIe and SERDES DT nodes Kishon Vijay Abraham I
2019-05-29 9:18 ` [PATCH 1/6] arm64: dts: k3-am6: Add "socionext, synquacer-pre-its" property to gic_its Kishon Vijay Abraham I
2019-05-29 9:18 ` [PATCH 2/6] arm64: dts: k3-am6: Add mux-controller DT node required for muxing SERDES Kishon Vijay Abraham I
@ 2019-05-29 9:18 ` Kishon Vijay Abraham I
2019-05-29 9:18 ` [PATCH 4/6] arm64: dts: k3-am6: Add PCIe Root Complex " Kishon Vijay Abraham I
` (3 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Kishon Vijay Abraham I @ 2019-05-29 9:18 UTC (permalink / raw)
To: Tero Kristo, Nishanth Menon
Cc: Mark Rutland, devicetree, linux-kernel, Kishon Vijay Abraham I,
Rob Herring, linux-arm-kernel
Add DT node for SERDES0 and SERDES1.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 41 ++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 99d2402455d1..443de60576f8 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -4,6 +4,7 @@
*
* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
*/
+#include <dt-bindings/phy/phy-am654-serdes.h>
&cbass_main {
msmc_ram: sram@70000000 {
@@ -61,6 +62,36 @@
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
};
+ serdes0: serdes@900000 {
+ compatible = "ti,phy-am654-serdes";
+ reg = <0x0 0x900000 0x0 0x2000>;
+ reg-names = "serdes";
+ #phy-cells = <2>;
+ power-domains = <&k3_pds 153>;
+ clocks = <&k3_clks 153 4>, <&k3_clks 153 1>, <&serdes1 AM654_SERDES_LO_REFCLK>;
+ clock-output-names = "serdes0_cmu_refclk", "serdes0_lo_refclk", "serdes0_ro_refclk";
+ assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
+ assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;
+ ti,serdes-clk = <&serdes0_clk>;
+ #clock-cells = <1>;
+ mux-controls = <&serdes_mux 0>;
+ };
+
+ serdes1: serdes@910000 {
+ compatible = "ti,phy-am654-serdes";
+ reg = <0x0 0x910000 0x0 0x2000>;
+ reg-names = "serdes";
+ #phy-cells = <2>;
+ power-domains = <&k3_pds 154>;
+ clocks = <&serdes0 AM654_SERDES_RO_REFCLK>, <&k3_clks 154 1>, <&k3_clks 154 5>;
+ clock-output-names = "serdes1_cmu_refclk", "serdes1_lo_refclk", "serdes1_ro_refclk";
+ assigned-clocks = <&k3_clks 154 5>, <&serdes1 AM654_SERDES_CMU_REFCLK>;
+ assigned-clock-parents = <&k3_clks 154 9>, <&k3_clks 154 5>;
+ ti,serdes-clk = <&serdes1_clk>;
+ #clock-cells = <1>;
+ mux-controls = <&serdes_mux 1>;
+ };
+
main_uart0: serial@2800000 {
compatible = "ti,am654-uart";
reg = <0x00 0x02800000 0x00 0x100>;
@@ -234,6 +265,16 @@
#size-cells = <1>;
ranges = <0x0 0x0 0x00100000 0x1c000>;
+ serdes0_clk: serdes_clk@4080 {
+ compatible = "syscon";
+ reg = <0x00004080 0x4>;
+ };
+
+ serdes1_clk: serdes_clk@4090 {
+ compatible = "syscon";
+ reg = <0x00004090 0x4>;
+ };
+
serdes_mux: mux-controller {
compatible = "mmio-mux";
#mux-control-cells = <1>;
--
2.17.1
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^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 4/6] arm64: dts: k3-am6: Add PCIe Root Complex DT node
2019-05-29 9:18 [PATCH 0/6] AM654: Add PCIe and SERDES DT nodes Kishon Vijay Abraham I
` (2 preceding siblings ...)
2019-05-29 9:18 ` [PATCH 3/6] arm64: dts: k3-am6: Add SERDES DT node Kishon Vijay Abraham I
@ 2019-05-29 9:18 ` Kishon Vijay Abraham I
2019-05-29 9:18 ` [PATCH 5/6] arm64: dts: k3-am6: Add PCIe Endpoint " Kishon Vijay Abraham I
` (2 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Kishon Vijay Abraham I @ 2019-05-29 9:18 UTC (permalink / raw)
To: Tero Kristo, Nishanth Menon
Cc: Mark Rutland, devicetree, linux-kernel, Kishon Vijay Abraham I,
Rob Herring, linux-arm-kernel
Add PCIe Root Complex DT node.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 53 ++++++++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am65.dtsi | 1 +
2 files changed, 54 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 443de60576f8..09f18b1e70f2 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -265,6 +265,21 @@
#size-cells = <1>;
ranges = <0x0 0x0 0x00100000 0x1c000>;
+ pcie0_mode: pcie-mode@4060 {
+ compatible = "syscon";
+ reg = <0x00004060 0x4>;
+ };
+
+ pcie1_mode: pcie-mode@4070 {
+ compatible = "syscon";
+ reg = <0x00004070 0x4>;
+ };
+
+ pcie_devid: pcie-devid@210 {
+ compatible = "syscon";
+ reg = <0x00000210 0x4>;
+ };
+
serdes0_clk: serdes_clk@4080 {
compatible = "syscon";
reg = <0x00004080 0x4>;
@@ -358,4 +373,42 @@
clock-names = "wkupclk", "refclk";
#phy-cells = <0>;
};
+
+ pcie0_rc: pcie@5500000 {
+ compatible = "ti,am654-pcie-rc";
+ reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x2000>, <0x0 0x5506000 0x0 0x1000>;
+ reg-names = "app", "dbics", "config", "atu";
+ power-domains = <&k3_pds 120>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges = <0x81000000 0 0 0x0 0x10020000 0 0x00010000
+ 0x82000000 0 0x10030000 0x0 0x10030000 0 0x07FD0000>;
+ ti,syscon-pcie-id = <&pcie_devid>;
+ ti,syscon-pcie-mode = <&pcie0_mode>;
+ bus-range = <0x0 0xff>;
+ num-viewport = <16>;
+ max-link-speed = <3>;
+ dma-coherent;
+ interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
+ msi-map = <0x0 &gic_its 0x0 0x10000>;
+ };
+
+ pcie1_rc: pcie@5600000 {
+ compatible = "ti,am654-pcie-rc";
+ reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x2000>, <0x0 0x5606000 0x0 0x1000>;
+ reg-names = "app", "dbics", "config", "atu";
+ power-domains = <&k3_pds 121>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges = <0x81000000 0 0 0x0 0x18020000 0 0x00010000
+ 0x82000000 0 0x18030000 0x0 0x18030000 0 0x07FD0000>;
+ ti,syscon-pcie-id = <&pcie_devid>;
+ ti,syscon-pcie-mode = <&pcie1_mode>;
+ bus-range = <0x0 0xff>;
+ num-viewport = <16>;
+ max-link-speed = <3>;
+ dma-coherent;
+ interrupts = <GIC_SPI 355 IRQ_TYPE_EDGE_RISING>;
+ msi-map = <0x0 &gic_its 0x10000 0x10000>;
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi
index 50f4be2047a9..5a021321d4ed 100644
--- a/arch/arm64/boot/dts/ti/k3-am65.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi
@@ -68,6 +68,7 @@
<0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
<0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
<0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
+ <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
/* MCUSS Range */
<0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
<0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
--
2.17.1
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^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 5/6] arm64: dts: k3-am6: Add PCIe Endpoint DT node
2019-05-29 9:18 [PATCH 0/6] AM654: Add PCIe and SERDES DT nodes Kishon Vijay Abraham I
` (3 preceding siblings ...)
2019-05-29 9:18 ` [PATCH 4/6] arm64: dts: k3-am6: Add PCIe Root Complex " Kishon Vijay Abraham I
@ 2019-05-29 9:18 ` Kishon Vijay Abraham I
2019-05-29 9:18 ` [PATCH 6/6] arm64: dts: ti: am654-base-board: Disable SERDES and PCIe Kishon Vijay Abraham I
2019-06-17 15:00 ` [PATCH 0/6] AM654: Add PCIe and SERDES DT nodes Tero Kristo
6 siblings, 0 replies; 8+ messages in thread
From: Kishon Vijay Abraham I @ 2019-05-29 9:18 UTC (permalink / raw)
To: Tero Kristo, Nishanth Menon
Cc: Mark Rutland, devicetree, linux-kernel, Kishon Vijay Abraham I,
Rob Herring, linux-arm-kernel
Add PCIe Endpoint DT node.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 26 ++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 09f18b1e70f2..fb8a13d670d2 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -393,6 +393,19 @@
msi-map = <0x0 &gic_its 0x0 0x10000>;
};
+ pcie0_ep: pcie-ep@5500000 {
+ compatible = "ti,am654-pcie-ep";
+ reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x8000000>, <0x0 0x5506000 0x0 0x1000>;
+ reg-names = "app", "dbics", "addr_space", "atu";
+ power-domains = <&k3_pds 120>;
+ ti,syscon-pcie-mode = <&pcie0_mode>;
+ num-ib-windows = <16>;
+ num-ob-windows = <16>;
+ max-link-speed = <3>;
+ dma-coherent;
+ interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
+ };
+
pcie1_rc: pcie@5600000 {
compatible = "ti,am654-pcie-rc";
reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x2000>, <0x0 0x5606000 0x0 0x1000>;
@@ -411,4 +424,17 @@
interrupts = <GIC_SPI 355 IRQ_TYPE_EDGE_RISING>;
msi-map = <0x0 &gic_its 0x10000 0x10000>;
};
+
+ pcie1_ep: pcie-ep@5600000 {
+ compatible = "ti,am654-pcie-ep";
+ reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x4000000>, <0x0 0x5606000 0x0 0x1000>;
+ reg-names = "app", "dbics", "addr_space", "atu";
+ power-domains = <&k3_pds 121>;
+ ti,syscon-pcie-mode = <&pcie1_mode>;
+ num-ib-windows = <16>;
+ num-ob-windows = <16>;
+ max-link-speed = <3>;
+ dma-coherent;
+ interrupts = <GIC_SPI 355 IRQ_TYPE_EDGE_RISING>;
+ };
};
--
2.17.1
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^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 6/6] arm64: dts: ti: am654-base-board: Disable SERDES and PCIe
2019-05-29 9:18 [PATCH 0/6] AM654: Add PCIe and SERDES DT nodes Kishon Vijay Abraham I
` (4 preceding siblings ...)
2019-05-29 9:18 ` [PATCH 5/6] arm64: dts: k3-am6: Add PCIe Endpoint " Kishon Vijay Abraham I
@ 2019-05-29 9:18 ` Kishon Vijay Abraham I
2019-06-17 15:00 ` [PATCH 0/6] AM654: Add PCIe and SERDES DT nodes Tero Kristo
6 siblings, 0 replies; 8+ messages in thread
From: Kishon Vijay Abraham I @ 2019-05-29 9:18 UTC (permalink / raw)
To: Tero Kristo, Nishanth Menon
Cc: Mark Rutland, devicetree, linux-kernel, Kishon Vijay Abraham I,
Rob Herring, linux-arm-kernel
AM654 base board does not have any PCIe slots. Disable all the
SERDES and PCIe instances.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
.../arm64/boot/dts/ti/k3-am654-base-board.dts | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index cf1aa276a1ea..abd7e4e218f2 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -228,3 +228,27 @@
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
};
+
+&serdes0 {
+ status = "disabled";
+};
+
+&serdes1 {
+ status = "disabled";
+};
+
+&pcie0_rc {
+ status = "disabled";
+};
+
+&pcie0_ep {
+ status = "disabled";
+};
+
+&pcie1_rc {
+ status = "disabled";
+};
+
+&pcie1_ep {
+ status = "disabled";
+};
--
2.17.1
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^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH 0/6] AM654: Add PCIe and SERDES DT nodes
2019-05-29 9:18 [PATCH 0/6] AM654: Add PCIe and SERDES DT nodes Kishon Vijay Abraham I
` (5 preceding siblings ...)
2019-05-29 9:18 ` [PATCH 6/6] arm64: dts: ti: am654-base-board: Disable SERDES and PCIe Kishon Vijay Abraham I
@ 2019-06-17 15:00 ` Tero Kristo
6 siblings, 0 replies; 8+ messages in thread
From: Tero Kristo @ 2019-06-17 15:00 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Nishanth Menon
Cc: Mark Rutland, devicetree, Rob Herring, linux-kernel, linux-arm-kernel
On 29/05/2019 12:18, Kishon Vijay Abraham I wrote:
> Patch series adds PCIe and SERDES DT nodes to k3-am65.dtsi and keeps
> them disabled in k3-am654-base-board.dts since there are no PCIe
> slots in the base board.
>
> PCIe slots are actually present in add on boards. Once overlay support
> is merged, I'll add overlay DTS files to enable PCIe.
>
> All the driver patches and binding documentation patches for PCIe and
> SERDES are already merged.
Queued up towards 5.3, thanks.
-Tero
>
> Kishon Vijay Abraham I (6):
> arm64: dts: k3-am6: Add "socionext,synquacer-pre-its" property to
> gic_its
> arm64: dts: k3-am6: Add mux-controller DT node required for muxing
> SERDES
> arm64: dts: k3-am6: Add SERDES DT node
> arm64: dts: k3-am6: Add PCIe Root Complex DT node
> arm64: dts: k3-am6: Add PCIe Endpoint DT node
> arm64: dts: ti: am654-base-board: Disable SERDES and PCIe
>
> arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 128 ++++++++++++++++++
> arch/arm64/boot/dts/ti/k3-am65.dtsi | 1 +
> .../arm64/boot/dts/ti/k3-am654-base-board.dts | 24 ++++
> 3 files changed, 153 insertions(+)
>
--
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^ permalink raw reply [flat|nested] 8+ messages in thread