From: Anson.Huang@nxp.com
To: aisheng.dong@nxp.com, festevam@gmail.com, shawnguo@kernel.org,
stefan@agner.ch, kernel@pengutronix.de, linus.walleij@linaro.org,
robh+dt@kernel.org, mark.rutland@arm.com, s.hauer@pengutronix.de,
linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: Linux-imx@nxp.com
Subject: [PATCH] dt-bindings: imx: Correct pinfunc head file path for i.MX8MM
Date: Thu, 30 May 2019 11:13:57 +0800 [thread overview]
Message-ID: <20190530031357.17484-1-Anson.Huang@nxp.com> (raw)
From: Anson Huang <Anson.Huang@nxp.com>
The i.MX8MM pinfunc head file is located in DT folder, correct it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt
index 524a16f..e4e01c0 100644
--- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt
@@ -12,7 +12,7 @@ Required properties in sub-nodes:
- fsl,pins: each entry consists of 6 integers and represents the mux and config
setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
input_val> are specified using a PIN_FUNC_ID macro, which can be found in
- <dt-bindings/pinctrl/imx8mm-pinfunc.h>. The last integer CONFIG is
+ <arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h>. The last integer CONFIG is
the pad setting value like pull-up on this pin. Please refer to i.MX8M Mini
Reference Manual for detailed CONFIG settings.
--
2.7.4
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next reply other threads:[~2019-05-30 3:12 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-30 3:13 Anson.Huang [this message]
2019-06-07 20:59 ` [PATCH] dt-bindings: imx: Correct pinfunc head file path for i.MX8MM Linus Walleij
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