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From: Anson.Huang@nxp.com
To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
	mark.rutland@arm.com, shawnguo@kernel.org,
	s.hauer@pengutronix.de, kernel@pengutronix.de,
	festevam@gmail.com, catalin.marinas@arm.com, will.deacon@arm.com,
	maxime.ripard@bootlin.com, olof@lixom.net,
	horms+renesas@verge.net.au, jagan@amarulasolutions.com,
	bjorn.andersson@linaro.org, leonard.crestez@nxp.com,
	dinguyen@kernel.org, enric.balletbo@collabora.com,
	aisheng.dong@nxp.com, ping.bai@nxp.com, abel.vesa@nxp.com,
	l.stach@pengutronix.de, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Cc: Linux-imx@nxp.com
Subject: [PATCH V3 2/4] clk: imx8mm: Make 1416X/1443X PLL macro definitions common for usage
Date: Tue,  4 Jun 2019 09:59:26 +0800	[thread overview]
Message-ID: <20190604015928.23157-2-Anson.Huang@nxp.com> (raw)
In-Reply-To: <20190604015928.23157-1-Anson.Huang@nxp.com>

From: Anson Huang <Anson.Huang@nxp.com>

1416X/1443X PLL are used on i.MX8MM and i.MX8MN and maybe
other i.MX8M series SoC later, the macro definitions of
these PLLs' initialization should be common for usage.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
New patch.
---
 drivers/clk/imx/clk-imx8mm.c | 17 -----------------
 drivers/clk/imx/clk.h        | 17 +++++++++++++++++
 2 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index eb9fcf0..fecb3b2 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -26,23 +26,6 @@ static u32 share_count_dcss;
 static u32 share_count_pdm;
 static u32 share_count_nand;
 
-#define PLL_1416X_RATE(_rate, _m, _p, _s)		\
-	{						\
-		.rate	=	(_rate),		\
-		.mdiv	=	(_m),			\
-		.pdiv	=	(_p),			\
-		.sdiv	=	(_s),			\
-	}
-
-#define PLL_1443X_RATE(_rate, _m, _p, _s, _k)		\
-	{						\
-		.rate	=	(_rate),		\
-		.mdiv	=	(_m),			\
-		.pdiv	=	(_p),			\
-		.sdiv	=	(_s),			\
-		.kdiv	=	(_k),			\
-	}
-
 static const struct imx_pll14xx_rate_table imx8mm_pll1416x_tbl[] = {
 	PLL_1416X_RATE(1800000000U, 225, 3, 0),
 	PLL_1416X_RATE(1600000000U, 200, 3, 0),
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 6dcdc91..ac8c4ae 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -81,6 +81,23 @@ enum imx_pllv3_type {
 	IMX_PLLV3_AV_IMX7,
 };
 
+#define PLL_1416X_RATE(_rate, _m, _p, _s)		\
+	{						\
+		.rate	=	(_rate),		\
+		.mdiv	=	(_m),			\
+		.pdiv	=	(_p),			\
+		.sdiv	=	(_s),			\
+	}
+
+#define PLL_1443X_RATE(_rate, _m, _p, _s, _k)		\
+	{						\
+		.rate	=	(_rate),		\
+		.mdiv	=	(_m),			\
+		.pdiv	=	(_p),			\
+		.sdiv	=	(_s),			\
+		.kdiv	=	(_k),			\
+	}
+
 struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
 		const char *parent_name, void __iomem *base, u32 div_mask);
 
-- 
2.7.4


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  reply	other threads:[~2019-06-04  1:58 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-04  1:59 [PATCH V3 1/4] dt-bindings: imx: Add clock binding doc for i.MX8MN Anson.Huang
2019-06-04  1:59 ` Anson.Huang [this message]
2019-06-04  1:59 ` [PATCH V3 3/4] clk: imx: Add support for i.MX8MN clock driver Anson.Huang
2019-06-06 16:25   ` Stephen Boyd
2019-06-07  0:50     ` Anson Huang
2019-06-07 18:00       ` Stephen Boyd
2019-06-08  9:58         ` Anson Huang
2019-06-10 15:14           ` Stephen Boyd
2019-06-11  2:06             ` Anson Huang
2019-06-25 22:34               ` Stephen Boyd
2019-06-04  1:59 ` [PATCH V3 4/4] arm64: defconfig: Select CONFIG_CLK_IMX8MN by default Anson.Huang
2019-06-05 23:33 ` [PATCH V3 1/4] dt-bindings: imx: Add clock binding doc for i.MX8MN Stephen Boyd
2019-06-06  1:14   ` Anson Huang

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