From: Raphael Gault <raphael.gault@arm.com>
To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: mark.rutland@arm.com, peterz@infradead.org,
catalin.marinas@arm.com, will.deacon@arm.com, acme@kernel.org,
Raphael Gault <raphael.gault@arm.com>,
mingo@redhat.com
Subject: [PATCH 7/7] Documentation: arm64: Document PMU counters access from userspace
Date: Tue, 11 Jun 2019 13:53:15 +0100 [thread overview]
Message-ID: <20190611125315.18736-8-raphael.gault@arm.com> (raw)
In-Reply-To: <20190611125315.18736-1-raphael.gault@arm.com>
Add a documentation file to describe the access to the pmu hardware
counters from userspace
Signed-off-by: Raphael Gault <raphael.gault@arm.com>
---
.../arm64/pmu_counter_user_access.txt | 42 +++++++++++++++++++
1 file changed, 42 insertions(+)
create mode 100644 Documentation/arm64/pmu_counter_user_access.txt
diff --git a/Documentation/arm64/pmu_counter_user_access.txt b/Documentation/arm64/pmu_counter_user_access.txt
new file mode 100644
index 000000000000..6788b1107381
--- /dev/null
+++ b/Documentation/arm64/pmu_counter_user_access.txt
@@ -0,0 +1,42 @@
+Access to PMU hardware counter from userspace
+=============================================
+
+Overview
+--------
+The perf user-space tool relies on the PMU to monitor events. It offers an
+abstraction layer over the hardware counters since the underlying
+implementation is cpu-dependent.
+Arm64 allows userspace tools to have access to the registers storing the
+hardware counters' values directly.
+
+This targets specifically self-monitoring tasks in order to reduce the overhead
+by directly accessing the registers without having to go through the kernel.
+
+How-to
+------
+The focus is set on the armv8 pmuv3 which makes sure that the access to the pmu
+registers is enable and that the userspace have access to the relevent
+information in order to use them.
+
+In order to have access to the hardware counter it is necessary to open the event
+using the perf tool interface: the sys_perf_event_open syscall returns a fd which
+can subsequently be used with the mmap syscall in order to retrieve a page of memory
+containing information about the event.
+The PMU driver uses this page to expose to the user the hardware counter's
+index. Using this index enables the user to access the PMU registers using the
+`mrs` instruction.
+
+Have a look `at tools/perf/arch/arm64/tests/user-events.c` for an example. It can be
+run using the perf tool to check that the access to the registers works
+correctly from userspace:
+
+./perf test -v
+
+About chained events
+--------------------
+When the user requests for an event to be counted on 64 bits, two hardware
+counters are used and need to be combined to retrieve the correct value:
+
+val = read_counter(idx);
+if ((event.attr.config1 & 0x1))
+ val = (val << 32) | read_counter(idx - 1);
--
2.17.1
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prev parent reply other threads:[~2019-06-11 12:56 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-11 12:53 [PATCH 0/7] arm64: Enable access to pmu registers by user-space Raphael Gault
2019-06-11 12:53 ` [PATCH 1/7] perf: arm64: Compile tests unconditionally Raphael Gault
2019-06-11 14:09 ` Mark Rutland
2019-06-11 14:23 ` Arnaldo Carvalho de Melo
2019-06-11 17:01 ` Mark Rutland
2019-06-11 12:53 ` [PATCH 2/7] perf: arm64: Add test to check userspace access to hardware counters Raphael Gault
2019-06-11 12:53 ` [PATCH 3/7] perf: arm64: Use rseq to test userspace access to pmu counters Raphael Gault
2019-06-11 14:33 ` Arnaldo Carvalho de Melo
2019-06-11 16:57 ` Mark Rutland
2019-06-11 19:33 ` Mathieu Desnoyers
2019-06-13 7:10 ` Raphael Gault
2019-06-13 8:27 ` Mathieu Desnoyers
2019-06-13 11:02 ` Raphael Gault
2019-06-25 13:20 ` Raphael Gault
2019-06-25 13:29 ` Raphael Gault
2019-06-25 13:41 ` Will Deacon
2019-06-11 12:53 ` [PATCH 4/7] arm64: pmu: Add function implementation to update event index in userpage Raphael Gault
2019-06-11 12:53 ` [PATCH 5/7] arm64: pmu: Add hook to handle pmu-related undefined instructions Raphael Gault
2019-06-11 12:53 ` [PATCH 6/7] arm64: perf: Enable pmu counter direct access for perf event on armv8 Raphael Gault
2019-06-11 12:53 ` Raphael Gault [this message]
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