From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56CBDC31E51 for ; Tue, 18 Jun 2019 13:32:30 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2CAC0206BA for ; Tue, 18 Jun 2019 13:32:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="ncBbNZlM" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2CAC0206BA Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=j52ZLYGmwJDCeoQbkp77HUTL7Vk4Ihwg44Ynl2d9gs8=; b=ncBbNZlMoNGpKd doXF6taCa5fgTItzZKHEgVp095GvuqJKdagCjxou3uxIeRJ4qtmvQ1hZnJa2PlTUBofaZkQnkt2Er k3ie+5+7p/0VNpL0UwKuSyVX9rCq8h52E6SiIq4iSkXx2IgAs6eins9zyWnFdKby+HHybsfF3UErG 5ka3vxArCHpfRkjhWlwZWsZjLfuq3Af5ZSisLiXH9de/Ws3DNY0IsLxAqwU+nPJx49/k2aE+jC4j6 OK6VGnBntnazIL1IwonzckyGeacP6x48P7P/RIdFZfWEHZfaRytdg0iUXsB+ifz+1lByuCuoY5xQ4 EFLZcBrfiAy0Bpa8KqDg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hdEDt-0005qy-Gy; Tue, 18 Jun 2019 13:32:29 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hdE3t-0006LQ-QF for linux-arm-kernel@lists.infradead.org; Tue, 18 Jun 2019 13:22:11 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 690722B; Tue, 18 Jun 2019 06:22:06 -0700 (PDT) Received: from e107155-lin (e107155-lin.cambridge.arm.com [10.1.196.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 814903F718; Tue, 18 Jun 2019 06:22:05 -0700 (PDT) Date: Tue, 18 Jun 2019 14:21:59 +0100 From: Sudeep Holla To: Andrew Murray Subject: Re: [PATCH v1 5/5] coresight: etm4x: save/restore state across CPU low power states Message-ID: <20190618132159.GA18121@e107155-lin> References: <20190618125433.9739-1-andrew.murray@arm.com> <20190618125433.9739-6-andrew.murray@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190618125433.9739-6-andrew.murray@arm.com> User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190618_062210_224199_7FD2E755 X-CRM114-Status: GOOD ( 11.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexander Shishkin , Sudeep Holla , linux-arm-kernel@lists.infradead.org, Mathieu Poirier , Suzuki K Poulose Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jun 18, 2019 at 01:54:33PM +0100, Andrew Murray wrote: > Some hardware will ignore bit TRCPDCR.PU which is used to signal > to hardware that power should not be removed from the trace unit. So, how or can we identify or discover such system ? DT/ACPI ? > Let's mitigate against this by saving and restoring the trace > unit state when the CPU enters low power states. > I prefer to do this conditionally. It's unnecessary on systems which don't ignore the TRCPDCR.PU and I really don't like them to be penalised while we want to add this support for *broken* systems. This is generally most useful to debug CPU suspend/resume exercising the code path completely with emulated CPU power on/off as most of the systems have the trace unit and the CPUs in the same power domain. Just curious if this reported on any platforms ? I wounder if we can use TRCPDSR(Power Down Status Register) to check the status. I know on Juno, it doesn't loose context rather the power down is emulated and saving/restoring may not be needed at all. Have you tested on Juno with and without these patches and seen any difference ? -- Regards, Sudeep _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel