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From: <alpawi@amazon.com>
Cc: Benjamin Herrenschmidt <benh@amazon.com>,
	Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Gregory Clement <gregory.clement@bootlin.com>,
	linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Linus Walleij <linus.walleij@linaro.org>,
	Patrick Williams <alpawi@amazon.com>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Subject: [PATCH 2/2] pinctrl: armada-37xx: fix control of pins 32 and up
Date: Tue, 18 Jun 2019 11:01:05 -0500	[thread overview]
Message-ID: <20190618160105.26343-3-alpawi@amazon.com> (raw)
In-Reply-To: <20190618160105.26343-1-alpawi@amazon.com>

From: Patrick Williams <alpawi@amazon.com>

The 37xx configuration registers are only 32 bits long, so
pins 32-35 spill over into the next register.  The calculation
for the register address was done, but the bitmask was not, so
any configuration to pin 32 or above resulted in a bitmask that
overflowed and performed no action.

Fix the register / offset calculation to also adjust the offset.

Signed-off-by: Patrick Williams <alpawi@amazon.com>
---
 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 00598b6f5c2a..82c980c5cccd 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -221,11 +221,11 @@ static const struct armada_37xx_pin_data armada_37xx_pin_sb = {
 };
 
 static inline void armada_37xx_calc_reg_offset(unsigned int *reg,
-					       unsigned int offset)
+					       unsigned int *offset)
 {
 	/* We never have more than 2 registers */
-	if (offset >= GPIO_PER_REG) {
-		offset -= GPIO_PER_REG;
+	if (*offset >= GPIO_PER_REG) {
+		*offset -= GPIO_PER_REG;
 		*reg += sizeof(u32);
 	}
 }
@@ -376,7 +376,7 @@ static inline void armada_37xx_irq_update_reg(unsigned int *reg,
 {
 	int offset = irqd_to_hwirq(d);
 
-	armada_37xx_calc_reg_offset(reg, offset);
+	armada_37xx_calc_reg_offset(reg, &offset);
 }
 
 static int armada_37xx_gpio_direction_input(struct gpio_chip *chip,
@@ -386,7 +386,7 @@ static int armada_37xx_gpio_direction_input(struct gpio_chip *chip,
 	unsigned int reg = OUTPUT_EN;
 	unsigned int mask;
 
-	armada_37xx_calc_reg_offset(&reg, offset);
+	armada_37xx_calc_reg_offset(&reg, &offset);
 	mask = BIT(offset);
 
 	return regmap_update_bits(info->regmap, reg, mask, 0);
@@ -399,7 +399,7 @@ static int armada_37xx_gpio_get_direction(struct gpio_chip *chip,
 	unsigned int reg = OUTPUT_EN;
 	unsigned int val, mask;
 
-	armada_37xx_calc_reg_offset(&reg, offset);
+	armada_37xx_calc_reg_offset(&reg, &offset);
 	mask = BIT(offset);
 	regmap_read(info->regmap, reg, &val);
 
@@ -413,7 +413,7 @@ static int armada_37xx_gpio_direction_output(struct gpio_chip *chip,
 	unsigned int reg = OUTPUT_EN;
 	unsigned int mask, val, ret;
 
-	armada_37xx_calc_reg_offset(&reg, offset);
+	armada_37xx_calc_reg_offset(&reg, &offset);
 	mask = BIT(offset);
 
 	ret = regmap_update_bits(info->regmap, reg, mask, mask);
@@ -434,7 +434,7 @@ static int armada_37xx_gpio_get(struct gpio_chip *chip, unsigned int offset)
 	unsigned int reg = INPUT_VAL;
 	unsigned int val, mask;
 
-	armada_37xx_calc_reg_offset(&reg, offset);
+	armada_37xx_calc_reg_offset(&reg, &offset);
 	mask = BIT(offset);
 
 	regmap_read(info->regmap, reg, &val);
@@ -449,7 +449,7 @@ static void armada_37xx_gpio_set(struct gpio_chip *chip, unsigned int offset,
 	unsigned int reg = OUTPUT_VAL;
 	unsigned int mask, val;
 
-	armada_37xx_calc_reg_offset(&reg, offset);
+	armada_37xx_calc_reg_offset(&reg, &offset);
 	mask = BIT(offset);
 	val = value ? mask : 0;
 
-- 
2.17.2 (Apple Git-113)


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  parent reply	other threads:[~2019-06-18 16:02 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-18 16:01 [PATCH 0/2] pinctl: armada-37xx: fix for pins 32+ alpawi
2019-06-18 16:01 ` [PATCH 1/2] pinctrl: armada-37xx: rename reg-offset function alpawi
2019-06-18 16:01 ` alpawi [this message]
2019-10-01 15:46   ` [PATCH v2] pinctrl: armada-37xx: fix control of pins 32 and up Patrick Williams
2019-10-04 21:54     ` Linus Walleij
2019-06-25 12:31 ` [PATCH 0/2] pinctl: armada-37xx: fix for pins 32+ Linus Walleij
2019-06-25 13:38   ` Gregory CLEMENT
2019-06-25 14:25     ` Patrick Williams

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