[PATCH v4 0/6] I2C: DWC3 USB: Add support for ACPI based AArch64 Laptops

[PATCH v4 0/6] I2C: DWC3 USB: Add support for ACPI based AArch64 Laptops

[Lee Jones]

This patch-set ensures the kernel is bootable on the newly released
AArch64 based Laptops using ACPI configuration tables.  The Pinctrl
changes have been accepted, leaving only I2C (keyboard, touchpad,
touchscreen, fingerprint, etc, HID device) and USB (root filesystem,
camera, networking, etc) enablement.

v4:
 * Collecting Acks
 * Adding Andy Gross' new email
 * Removing applied Pinctrl patches
 
Lee Jones (6):
  i2c: i2c-qcom-geni: Provide support for ACPI
  i2c: i2c-qcom-geni: Signify successful driver probe
  soc: qcom: geni: Add support for ACPI
  usb: dwc3: qcom: Add support for booting with ACPI
  usb: dwc3: qcom: Start USB in 'host mode' on the SDM845
  usb: dwc3: qcom: Improve error handling

 drivers/i2c/busses/i2c-qcom-geni.c |  17 ++-
 drivers/soc/qcom/qcom-geni-se.c    |  21 ++-
 drivers/usb/dwc3/Kconfig           |   2 +-
 drivers/usb/dwc3/dwc3-qcom.c       | 221 +++++++++++++++++++++++++----
 4 files changed, 225 insertions(+), 36 deletions(-)

-- 
2.17.1


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[PATCH v4 1/6] i2c: i2c-qcom-geni: Provide support for ACPI

[Lee Jones]

Add a match table to allow automatic probing of ACPI device
QCOM0220.  Ignore clock attainment errors.  Set default clock
frequency value.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 drivers/i2c/busses/i2c-qcom-geni.c | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c
index db075bc0d952..9e3b8a98688d 100644
--- a/drivers/i2c/busses/i2c-qcom-geni.c
+++ b/drivers/i2c/busses/i2c-qcom-geni.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
 
+#include <linux/acpi.h>
 #include <linux/clk.h>
 #include <linux/dma-mapping.h>
 #include <linux/err.h>
@@ -483,6 +484,14 @@ static const struct i2c_algorithm geni_i2c_algo = {
 	.functionality	= geni_i2c_func,
 };
 
+#ifdef CONFIG_ACPI
+static const struct acpi_device_id geni_i2c_acpi_match[] = {
+	{ "QCOM0220"},
+	{ },
+};
+MODULE_DEVICE_TABLE(acpi, geni_i2c_acpi_match);
+#endif
+
 static int geni_i2c_probe(struct platform_device *pdev)
 {
 	struct geni_i2c_dev *gi2c;
@@ -502,7 +511,7 @@ static int geni_i2c_probe(struct platform_device *pdev)
 		return PTR_ERR(gi2c->se.base);
 
 	gi2c->se.clk = devm_clk_get(&pdev->dev, "se");
-	if (IS_ERR(gi2c->se.clk)) {
+	if (IS_ERR(gi2c->se.clk) && !has_acpi_companion(&pdev->dev)) {
 		ret = PTR_ERR(gi2c->se.clk);
 		dev_err(&pdev->dev, "Err getting SE Core clk %d\n", ret);
 		return ret;
@@ -516,6 +525,9 @@ static int geni_i2c_probe(struct platform_device *pdev)
 		gi2c->clk_freq_out = KHZ(100);
 	}
 
+	if (has_acpi_companion(&pdev->dev))
+		ACPI_COMPANION_SET(&gi2c->adap.dev, ACPI_COMPANION(&pdev->dev));
+
 	gi2c->irq = platform_get_irq(pdev, 0);
 	if (gi2c->irq < 0) {
 		dev_err(&pdev->dev, "IRQ error for i2c-geni\n");
@@ -660,6 +672,7 @@ static struct platform_driver geni_i2c_driver = {
 		.name = "geni_i2c",
 		.pm = &geni_i2c_pm_ops,
 		.of_match_table = geni_i2c_dt_match,
+		.acpi_match_table = ACPI_PTR(geni_i2c_acpi_match),
 	},
 };
 
-- 
2.17.1


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Re: [PATCH v4 1/6] i2c: i2c-qcom-geni: Provide support for ACPI

[Wolfram Sang]

[-- Attachment #1.1: Type: text/plain, Size: 410 bytes --]

On Wed, Jun 12, 2019 at 03:26:49PM +0100, Lee Jones wrote:
> Add a match table to allow automatic probing of ACPI device
> QCOM0220.  Ignore clock attainment errors.  Set default clock
> frequency value.
> 
> Signed-off-by: Lee Jones <lee.jones@linaro.org>
> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Applied to for-next, thanks!

Alok, are you still there? Your ack is missed here...


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[PATCH v4 2/6] i2c: i2c-qcom-geni: Signify successful driver probe

[Lee Jones]

The Qualcomm Geni I2C driver currently probes silently which can be
confusing when debugging potential issues.  Add a low level (INFO)
print when each I2C controller is successfully initially set-up.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 drivers/i2c/busses/i2c-qcom-geni.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c
index 9e3b8a98688d..a89bfce5388e 100644
--- a/drivers/i2c/busses/i2c-qcom-geni.c
+++ b/drivers/i2c/busses/i2c-qcom-geni.c
@@ -596,6 +596,8 @@ static int geni_i2c_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	dev_dbg(&pdev->dev, "Geni-I2C adaptor successfully added\n");
+
 	return 0;
 }
 
-- 
2.17.1


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Re: [PATCH v4 2/6] i2c: i2c-qcom-geni: Signify successful driver probe

[Wolfram Sang]

[-- Attachment #1.1: Type: text/plain, Size: 529 bytes --]

On Wed, Jun 12, 2019 at 03:26:50PM +0100, Lee Jones wrote:
> The Qualcomm Geni I2C driver currently probes silently which can be
> confusing when debugging potential issues.  Add a low level (INFO)
> print when each I2C controller is successfully initially set-up.
> 
> Signed-off-by: Lee Jones <lee.jones@linaro.org>
> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Applied to for-next, thanks!

Alok, are you still there? Your ack is missed here...


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[PATCH v4 3/6] soc: qcom: geni: Add support for ACPI

[Lee Jones]

When booting with ACPI as the active set of configuration tables,
all; clocks, regulators, pin functions ect are expected to be at
their ideal values/levels/rates, thus the associated frameworks
are unavailable.  Ensure calls to these APIs are shielded when
ACPI is enabled.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 drivers/soc/qcom/qcom-geni-se.c | 21 +++++++++++++++------
 1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c
index 6b8ef01472e9..d5cf953b4337 100644
--- a/drivers/soc/qcom/qcom-geni-se.c
+++ b/drivers/soc/qcom/qcom-geni-se.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
 
+#include <linux/acpi.h>
 #include <linux/clk.h>
 #include <linux/slab.h>
 #include <linux/dma-mapping.h>
@@ -450,6 +451,9 @@ int geni_se_resources_off(struct geni_se *se)
 {
 	int ret;
 
+	if (has_acpi_companion(se->dev))
+		return 0;
+
 	ret = pinctrl_pm_select_sleep_state(se->dev);
 	if (ret)
 		return ret;
@@ -487,6 +491,9 @@ int geni_se_resources_on(struct geni_se *se)
 {
 	int ret;
 
+	if (has_acpi_companion(se->dev))
+		return 0;
+
 	ret = geni_se_clks_on(se);
 	if (ret)
 		return ret;
@@ -724,12 +731,14 @@ static int geni_se_probe(struct platform_device *pdev)
 	if (IS_ERR(wrapper->base))
 		return PTR_ERR(wrapper->base);
 
-	wrapper->ahb_clks[0].id = "m-ahb";
-	wrapper->ahb_clks[1].id = "s-ahb";
-	ret = devm_clk_bulk_get(dev, NUM_AHB_CLKS, wrapper->ahb_clks);
-	if (ret) {
-		dev_err(dev, "Err getting AHB clks %d\n", ret);
-		return ret;
+	if (!has_acpi_companion(&pdev->dev)) {
+		wrapper->ahb_clks[0].id = "m-ahb";
+		wrapper->ahb_clks[1].id = "s-ahb";
+		ret = devm_clk_bulk_get(dev, NUM_AHB_CLKS, wrapper->ahb_clks);
+		if (ret) {
+			dev_err(dev, "Err getting AHB clks %d\n", ret);
+			return ret;
+		}
 	}
 
 	dev_set_drvdata(dev, wrapper);
-- 
2.17.1


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Re: [PATCH v4 3/6] soc: qcom: geni: Add support for ACPI

[Lee Jones]

David, Andy,

Since there does not appear to be any other Maintainers for this
file/subsystem, one of you guys are going to have to at least
review/ack it.

Which route do changes to this file usually take?

At worst I can take them, but I need maintainer Acks to do so.

===========================

> When booting with ACPI as the active set of configuration tables,
> all; clocks, regulators, pin functions ect are expected to be at
> their ideal values/levels/rates, thus the associated frameworks
> are unavailable.  Ensure calls to these APIs are shielded when
> ACPI is enabled.
> 
> Signed-off-by: Lee Jones <lee.jones@linaro.org>
> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
>  drivers/soc/qcom/qcom-geni-se.c | 21 +++++++++++++++------
>  1 file changed, 15 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c
> index 6b8ef01472e9..d5cf953b4337 100644
> --- a/drivers/soc/qcom/qcom-geni-se.c
> +++ b/drivers/soc/qcom/qcom-geni-se.c
> @@ -1,6 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0
>  // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
>  
> +#include <linux/acpi.h>
>  #include <linux/clk.h>
>  #include <linux/slab.h>
>  #include <linux/dma-mapping.h>
> @@ -450,6 +451,9 @@ int geni_se_resources_off(struct geni_se *se)
>  {
>  	int ret;
>  
> +	if (has_acpi_companion(se->dev))
> +		return 0;
> +
>  	ret = pinctrl_pm_select_sleep_state(se->dev);
>  	if (ret)
>  		return ret;
> @@ -487,6 +491,9 @@ int geni_se_resources_on(struct geni_se *se)
>  {
>  	int ret;
>  
> +	if (has_acpi_companion(se->dev))
> +		return 0;
> +
>  	ret = geni_se_clks_on(se);
>  	if (ret)
>  		return ret;
> @@ -724,12 +731,14 @@ static int geni_se_probe(struct platform_device *pdev)
>  	if (IS_ERR(wrapper->base))
>  		return PTR_ERR(wrapper->base);
>  
> -	wrapper->ahb_clks[0].id = "m-ahb";
> -	wrapper->ahb_clks[1].id = "s-ahb";
> -	ret = devm_clk_bulk_get(dev, NUM_AHB_CLKS, wrapper->ahb_clks);
> -	if (ret) {
> -		dev_err(dev, "Err getting AHB clks %d\n", ret);
> -		return ret;
> +	if (!has_acpi_companion(&pdev->dev)) {
> +		wrapper->ahb_clks[0].id = "m-ahb";
> +		wrapper->ahb_clks[1].id = "s-ahb";
> +		ret = devm_clk_bulk_get(dev, NUM_AHB_CLKS, wrapper->ahb_clks);
> +		if (ret) {
> +			dev_err(dev, "Err getting AHB clks %d\n", ret);
> +			return ret;
> +		}
>  	}
>  
>  	dev_set_drvdata(dev, wrapper);

-- 
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

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Re: [PATCH v4 3/6] soc: qcom: geni: Add support for ACPI

[Bjorn Andersson]

On Wed 12 Jun 07:26 PDT 2019, Lee Jones wrote:

> When booting with ACPI as the active set of configuration tables,
> all; clocks, regulators, pin functions ect are expected to be at
> their ideal values/levels/rates, thus the associated frameworks
> are unavailable.  Ensure calls to these APIs are shielded when
> ACPI is enabled.
> 

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> Signed-off-by: Lee Jones <lee.jones@linaro.org>
> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
>  drivers/soc/qcom/qcom-geni-se.c | 21 +++++++++++++++------
>  1 file changed, 15 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c
> index 6b8ef01472e9..d5cf953b4337 100644
> --- a/drivers/soc/qcom/qcom-geni-se.c
> +++ b/drivers/soc/qcom/qcom-geni-se.c
> @@ -1,6 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0
>  // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
>  
> +#include <linux/acpi.h>
>  #include <linux/clk.h>
>  #include <linux/slab.h>
>  #include <linux/dma-mapping.h>
> @@ -450,6 +451,9 @@ int geni_se_resources_off(struct geni_se *se)
>  {
>  	int ret;
>  
> +	if (has_acpi_companion(se->dev))
> +		return 0;
> +
>  	ret = pinctrl_pm_select_sleep_state(se->dev);
>  	if (ret)
>  		return ret;
> @@ -487,6 +491,9 @@ int geni_se_resources_on(struct geni_se *se)
>  {
>  	int ret;
>  
> +	if (has_acpi_companion(se->dev))
> +		return 0;
> +
>  	ret = geni_se_clks_on(se);
>  	if (ret)
>  		return ret;
> @@ -724,12 +731,14 @@ static int geni_se_probe(struct platform_device *pdev)
>  	if (IS_ERR(wrapper->base))
>  		return PTR_ERR(wrapper->base);
>  
> -	wrapper->ahb_clks[0].id = "m-ahb";
> -	wrapper->ahb_clks[1].id = "s-ahb";
> -	ret = devm_clk_bulk_get(dev, NUM_AHB_CLKS, wrapper->ahb_clks);
> -	if (ret) {
> -		dev_err(dev, "Err getting AHB clks %d\n", ret);
> -		return ret;
> +	if (!has_acpi_companion(&pdev->dev)) {
> +		wrapper->ahb_clks[0].id = "m-ahb";
> +		wrapper->ahb_clks[1].id = "s-ahb";
> +		ret = devm_clk_bulk_get(dev, NUM_AHB_CLKS, wrapper->ahb_clks);
> +		if (ret) {
> +			dev_err(dev, "Err getting AHB clks %d\n", ret);
> +			return ret;
> +		}
>  	}
>  
>  	dev_set_drvdata(dev, wrapper);
> -- 
> 2.17.1
> 

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[PATCH v4 4/6] usb: dwc3: qcom: Add support for booting with ACPI

[Lee Jones]

In Linux, the DWC3 core exists as its own independent platform device.
Thus when describing relationships in Device Tree, the current default
boot configuration table option, the DWC3 core often resides as a child
of the platform specific node.  Both of which are given their own
address space descriptions and the drivers can be mostly agnostic to
each other.

However, other Operating Systems have taken a more monolithic approach,
which is evident in the configuration ACPI tables for the Qualcomm
Snapdragon SDM850, where all DWC3 (core and platform) components are
described under a single IO memory region.

To ensure successful booting using the supplied ACPI tables, we need to
devise a way to chop up the address regions provided and subsequently
register the DWC3 core with the resultant information, which is
precisely what this patch aims to achieve.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 drivers/usb/dwc3/Kconfig     |   2 +-
 drivers/usb/dwc3/dwc3-qcom.c | 206 ++++++++++++++++++++++++++++++-----
 2 files changed, 179 insertions(+), 29 deletions(-)

diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 2b1494460d0c..6dab3fd1e233 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -116,7 +116,7 @@ config USB_DWC3_ST
 config USB_DWC3_QCOM
 	tristate "Qualcomm Platform"
 	depends on EXTCON && (ARCH_QCOM || COMPILE_TEST)
-	depends on OF
+	depends on (OF || ACPI)
 	default USB_DWC3
 	help
 	  Some Qualcomm SoCs use DesignWare Core IP for USB2/3
diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
index 184df4daa590..1e1f12b7991d 100644
--- a/drivers/usb/dwc3/dwc3-qcom.c
+++ b/drivers/usb/dwc3/dwc3-qcom.c
@@ -4,6 +4,7 @@
  * Inspired by dwc3-of-simple.c
  */
 
+#include <linux/acpi.h>
 #include <linux/io.h>
 #include <linux/of.h>
 #include <linux/clk.h>
@@ -38,6 +39,20 @@
 #define PWR_EVNT_LPM_IN_L2_MASK			BIT(4)
 #define PWR_EVNT_LPM_OUT_L2_MASK		BIT(5)
 
+#define SDM845_QSCRATCH_BASE_OFFSET		0xf8800
+#define SDM845_QSCRATCH_SIZE			0x400
+#define SDM845_DWC3_CORE_SIZE			0xcd00
+
+struct dwc3_acpi_pdata {
+	u32			qscratch_base_offset;
+	u32			qscratch_base_size;
+	u32			dwc3_core_base_size;
+	int			hs_phy_irq_index;
+	int			dp_hs_phy_irq_index;
+	int			dm_hs_phy_irq_index;
+	int			ss_phy_irq_index;
+};
+
 struct dwc3_qcom {
 	struct device		*dev;
 	void __iomem		*qscratch_base;
@@ -56,6 +71,8 @@ struct dwc3_qcom {
 	struct notifier_block	vbus_nb;
 	struct notifier_block	host_nb;
 
+	const struct dwc3_acpi_pdata *acpi_pdata;
+
 	enum usb_dr_mode	mode;
 	bool			is_suspended;
 	bool			pm_suspended;
@@ -300,12 +317,27 @@ static void dwc3_qcom_select_utmi_clk(struct dwc3_qcom *qcom)
 			  PIPE_UTMI_CLK_DIS);
 }
 
+static int dwc3_qcom_get_irq(struct platform_device *pdev,
+			     const char *name, int num)
+{
+	struct device_node *np = pdev->dev.of_node;
+	int ret;
+
+	if (np)
+		ret = platform_get_irq_byname(pdev, name);
+	else
+		ret = platform_get_irq(pdev, num);
+
+	return ret;
+}
+
 static int dwc3_qcom_setup_irq(struct platform_device *pdev)
 {
 	struct dwc3_qcom *qcom = platform_get_drvdata(pdev);
+	const struct dwc3_acpi_pdata *pdata = qcom->acpi_pdata;
 	int irq, ret;
-
-	irq = platform_get_irq_byname(pdev, "hs_phy_irq");
+	irq = dwc3_qcom_get_irq(pdev, "hs_phy_irq",
+				pdata ? pdata->hs_phy_irq_index : -1);
 	if (irq > 0) {
 		/* Keep wakeup interrupts disabled until suspend */
 		irq_set_status_flags(irq, IRQ_NOAUTOEN);
@@ -320,7 +352,8 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev)
 		qcom->hs_phy_irq = irq;
 	}
 
-	irq = platform_get_irq_byname(pdev, "dp_hs_phy_irq");
+	irq = dwc3_qcom_get_irq(pdev, "dp_hs_phy_irq",
+				pdata ? pdata->dp_hs_phy_irq_index : -1);
 	if (irq > 0) {
 		irq_set_status_flags(irq, IRQ_NOAUTOEN);
 		ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
@@ -334,7 +367,8 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev)
 		qcom->dp_hs_phy_irq = irq;
 	}
 
-	irq = platform_get_irq_byname(pdev, "dm_hs_phy_irq");
+	irq = dwc3_qcom_get_irq(pdev, "dm_hs_phy_irq",
+				pdata ? pdata->dm_hs_phy_irq_index : -1);
 	if (irq > 0) {
 		irq_set_status_flags(irq, IRQ_NOAUTOEN);
 		ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
@@ -348,7 +382,8 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev)
 		qcom->dm_hs_phy_irq = irq;
 	}
 
-	irq = platform_get_irq_byname(pdev, "ss_phy_irq");
+	irq = dwc3_qcom_get_irq(pdev, "ss_phy_irq",
+				pdata ? pdata->ss_phy_irq_index : -1);
 	if (irq > 0) {
 		irq_set_status_flags(irq, IRQ_NOAUTOEN);
 		ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
@@ -371,11 +406,11 @@ static int dwc3_qcom_clk_init(struct dwc3_qcom *qcom, int count)
 	struct device_node	*np = dev->of_node;
 	int			i;
 
-	qcom->num_clocks = count;
-
-	if (!count)
+	if (!np || !count)
 		return 0;
 
+	qcom->num_clocks = count;
+
 	qcom->clks = devm_kcalloc(dev, qcom->num_clocks,
 				  sizeof(struct clk *), GFP_KERNEL);
 	if (!qcom->clks)
@@ -409,12 +444,103 @@ static int dwc3_qcom_clk_init(struct dwc3_qcom *qcom, int count)
 	return 0;
 }
 
-static int dwc3_qcom_probe(struct platform_device *pdev)
+static int dwc3_qcom_acpi_register_core(struct platform_device *pdev)
 {
+	struct dwc3_qcom 	*qcom = platform_get_drvdata(pdev);
+	struct device		*dev = &pdev->dev;
+	struct resource		*res, *child_res = NULL;
+	int			irq;
+	int			ret;
+
+	qcom->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
+	if (!qcom->dwc3)
+		return -ENOMEM;
+
+	qcom->dwc3->dev.parent = dev;
+	qcom->dwc3->dev.type = dev->type;
+	qcom->dwc3->dev.dma_mask = dev->dma_mask;
+	qcom->dwc3->dev.dma_parms = dev->dma_parms;
+	qcom->dwc3->dev.coherent_dma_mask = dev->coherent_dma_mask;
+
+	child_res = kcalloc(2, sizeof(*child_res), GFP_KERNEL);
+	if (!child_res)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res) {
+		dev_err(&pdev->dev, "failed to get memory resource\n");
+		ret = -ENODEV;
+		goto out;
+	}
+
+	child_res[0].flags = res->flags;
+	child_res[0].start = res->start;
+	child_res[0].end = child_res[0].start +
+		qcom->acpi_pdata->dwc3_core_base_size;
+
+	irq = platform_get_irq(pdev, 0);
+	child_res[1].flags = IORESOURCE_IRQ;
+	child_res[1].start = child_res[1].end = irq;
+
+	ret = platform_device_add_resources(qcom->dwc3, child_res, 2);
+	if (ret) {
+		dev_err(&pdev->dev, "failed to add resources\n");
+		goto out;
+	}
+
+	ret = platform_device_add(qcom->dwc3);
+	if (ret)
+		dev_err(&pdev->dev, "failed to add device\n");
+
+out:
+	kfree(child_res);
+	return ret;
+}
+
+static int dwc3_qcom_of_register_core(struct platform_device *pdev)
+{
+	struct dwc3_qcom 	*qcom = platform_get_drvdata(pdev);
 	struct device_node	*np = pdev->dev.of_node, *dwc3_np;
 	struct device		*dev = &pdev->dev;
+	int			ret;
+
+	dwc3_np = of_get_child_by_name(np, "dwc3");
+	if (!dwc3_np) {
+		dev_err(dev, "failed to find dwc3 core child\n");
+		return -ENODEV;
+	}
+
+	ret = of_platform_populate(np, NULL, NULL, dev);
+	if (ret) {
+		dev_err(dev, "failed to register dwc3 core - %d\n", ret);
+		return ret;
+	}
+
+	qcom->dwc3 = of_find_device_by_node(dwc3_np);
+	if (!qcom->dwc3) {
+		dev_err(dev, "failed to get dwc3 platform device\n");
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+static const struct dwc3_acpi_pdata sdm845_acpi_pdata = {
+	.qscratch_base_offset = SDM845_QSCRATCH_BASE_OFFSET,
+	.qscratch_base_size = SDM845_QSCRATCH_SIZE,
+	.dwc3_core_base_size = SDM845_DWC3_CORE_SIZE,
+	.hs_phy_irq_index = 1,
+	.dp_hs_phy_irq_index = 4,
+	.dm_hs_phy_irq_index = 3,
+	.ss_phy_irq_index = 2
+};
+
+static int dwc3_qcom_probe(struct platform_device *pdev)
+{
+	struct device_node	*np = pdev->dev.of_node;
+	struct device		*dev = &pdev->dev;
 	struct dwc3_qcom	*qcom;
-	struct resource		*res;
+	struct resource		*res, *parent_res = NULL;
 	int			ret, i;
 	bool			ignore_pipe_clk;
 
@@ -425,6 +551,14 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, qcom);
 	qcom->dev = &pdev->dev;
 
+	if (ACPI_HANDLE(dev)) {
+		qcom->acpi_pdata = acpi_device_get_match_data(dev);
+		if (!qcom->acpi_pdata) {
+			dev_err(&pdev->dev, "no supporting ACPI device data\n");
+			return -EINVAL;
+		}
+	}
+
 	qcom->resets = devm_reset_control_array_get_optional_exclusive(dev);
 	if (IS_ERR(qcom->resets)) {
 		ret = PTR_ERR(qcom->resets);
@@ -454,7 +588,21 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
 	}
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	qcom->qscratch_base = devm_ioremap_resource(dev, res);
+
+	if (np) {
+		parent_res = res;
+	} else {
+		parent_res = kmemdup(res, sizeof(struct resource), GFP_KERNEL);
+		if (!parent_res)
+			return -ENOMEM;
+
+		parent_res->start = res->start +
+			qcom->acpi_pdata->qscratch_base_offset;
+		parent_res->end = parent_res->start +
+			qcom->acpi_pdata->qscratch_base_size;
+	}
+
+	qcom->qscratch_base = devm_ioremap_resource(dev, parent_res);
 	if (IS_ERR(qcom->qscratch_base)) {
 		dev_err(dev, "failed to map qscratch, err=%d\n", ret);
 		ret = PTR_ERR(qcom->qscratch_base);
@@ -462,13 +610,8 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
 	}
 
 	ret = dwc3_qcom_setup_irq(pdev);
-	if (ret)
-		goto clk_disable;
-
-	dwc3_np = of_get_child_by_name(np, "dwc3");
-	if (!dwc3_np) {
-		dev_err(dev, "failed to find dwc3 core child\n");
-		ret = -ENODEV;
+	if (ret) {
+		dev_err(dev, "failed to setup IRQs, err=%d\n", ret);
 		goto clk_disable;
 	}
 
@@ -481,16 +624,13 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
 	if (ignore_pipe_clk)
 		dwc3_qcom_select_utmi_clk(qcom);
 
-	ret = of_platform_populate(np, NULL, NULL, dev);
-	if (ret) {
-		dev_err(dev, "failed to register dwc3 core - %d\n", ret);
-		goto clk_disable;
-	}
+	if (np)
+		ret = dwc3_qcom_of_register_core(pdev);
+	else
+		ret = dwc3_qcom_acpi_register_core(pdev);
 
-	qcom->dwc3 = of_find_device_by_node(dwc3_np);
-	if (!qcom->dwc3) {
-		dev_err(&pdev->dev, "failed to get dwc3 platform device\n");
-		ret = -ENODEV;
+	if (ret) {
+		dev_err(dev, "failed to register DWC3 Core, err=%d\n", ret);
 		goto depopulate;
 	}
 
@@ -514,7 +654,10 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
 	return 0;
 
 depopulate:
-	of_platform_depopulate(&pdev->dev);
+	if (np)
+		of_platform_depopulate(&pdev->dev);
+	else
+		platform_device_put(pdev);
 clk_disable:
 	for (i = qcom->num_clocks - 1; i >= 0; i--) {
 		clk_disable_unprepare(qcom->clks[i]);
@@ -601,6 +744,12 @@ static const struct of_device_id dwc3_qcom_of_match[] = {
 };
 MODULE_DEVICE_TABLE(of, dwc3_qcom_of_match);
 
+static const struct acpi_device_id dwc3_qcom_acpi_match[] = {
+	{ "QCOM2430", (unsigned long)&sdm845_acpi_pdata },
+	{ },
+};
+MODULE_DEVICE_TABLE(acpi, dwc3_qcom_acpi_match);
+
 static struct platform_driver dwc3_qcom_driver = {
 	.probe		= dwc3_qcom_probe,
 	.remove		= dwc3_qcom_remove,
@@ -608,6 +757,7 @@ static struct platform_driver dwc3_qcom_driver = {
 		.name	= "dwc3-qcom",
 		.pm	= &dwc3_qcom_dev_pm_ops,
 		.of_match_table	= dwc3_qcom_of_match,
+		.acpi_match_table = ACPI_PTR(dwc3_qcom_acpi_match),
 	},
 };
 
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v4 4/6] usb: dwc3: qcom: Add support for booting with ACPI

[Lee Jones]

Felipe,

> In Linux, the DWC3 core exists as its own independent platform device.
> Thus when describing relationships in Device Tree, the current default
> boot configuration table option, the DWC3 core often resides as a child
> of the platform specific node.  Both of which are given their own
> address space descriptions and the drivers can be mostly agnostic to
> each other.
> 
> However, other Operating Systems have taken a more monolithic approach,
> which is evident in the configuration ACPI tables for the Qualcomm
> Snapdragon SDM850, where all DWC3 (core and platform) components are
> described under a single IO memory region.
> 
> To ensure successful booting using the supplied ACPI tables, we need to
> devise a way to chop up the address regions provided and subsequently
> register the DWC3 core with the resultant information, which is
> precisely what this patch aims to achieve.
> 
> Signed-off-by: Lee Jones <lee.jones@linaro.org>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
>  drivers/usb/dwc3/Kconfig     |   2 +-
>  drivers/usb/dwc3/dwc3-qcom.c | 206 ++++++++++++++++++++++++++++++-----
>  2 files changed, 179 insertions(+), 29 deletions(-)

I'm starting to get a little twitchy about these patches now.  Due to
the release cadence of the larger Linux distros, it's pretty important
that these changes land in v5.3.  Without them, it is impossible to
install Linux on some pretty high profile emerging platforms.

It's already -rc5 and I'm concerned that we're going to miss the
merge-window.  Would you be kind enough to review these patches
please?  The Pinctrl and I2C parts of the set have already been
merged.

TIA.

> diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
> index 2b1494460d0c..6dab3fd1e233 100644
> --- a/drivers/usb/dwc3/Kconfig
> +++ b/drivers/usb/dwc3/Kconfig
> @@ -116,7 +116,7 @@ config USB_DWC3_ST
>  config USB_DWC3_QCOM
>  	tristate "Qualcomm Platform"
>  	depends on EXTCON && (ARCH_QCOM || COMPILE_TEST)
> -	depends on OF
> +	depends on (OF || ACPI)
>  	default USB_DWC3
>  	help
>  	  Some Qualcomm SoCs use DesignWare Core IP for USB2/3
> diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
> index 184df4daa590..1e1f12b7991d 100644
> --- a/drivers/usb/dwc3/dwc3-qcom.c
> +++ b/drivers/usb/dwc3/dwc3-qcom.c
> @@ -4,6 +4,7 @@
>   * Inspired by dwc3-of-simple.c
>   */
>  
> +#include <linux/acpi.h>
>  #include <linux/io.h>
>  #include <linux/of.h>
>  #include <linux/clk.h>
> @@ -38,6 +39,20 @@
>  #define PWR_EVNT_LPM_IN_L2_MASK			BIT(4)
>  #define PWR_EVNT_LPM_OUT_L2_MASK		BIT(5)
>  
> +#define SDM845_QSCRATCH_BASE_OFFSET		0xf8800
> +#define SDM845_QSCRATCH_SIZE			0x400
> +#define SDM845_DWC3_CORE_SIZE			0xcd00
> +
> +struct dwc3_acpi_pdata {
> +	u32			qscratch_base_offset;
> +	u32			qscratch_base_size;
> +	u32			dwc3_core_base_size;
> +	int			hs_phy_irq_index;
> +	int			dp_hs_phy_irq_index;
> +	int			dm_hs_phy_irq_index;
> +	int			ss_phy_irq_index;
> +};
> +
>  struct dwc3_qcom {
>  	struct device		*dev;
>  	void __iomem		*qscratch_base;
> @@ -56,6 +71,8 @@ struct dwc3_qcom {
>  	struct notifier_block	vbus_nb;
>  	struct notifier_block	host_nb;
>  
> +	const struct dwc3_acpi_pdata *acpi_pdata;
> +
>  	enum usb_dr_mode	mode;
>  	bool			is_suspended;
>  	bool			pm_suspended;
> @@ -300,12 +317,27 @@ static void dwc3_qcom_select_utmi_clk(struct dwc3_qcom *qcom)
>  			  PIPE_UTMI_CLK_DIS);
>  }
>  
> +static int dwc3_qcom_get_irq(struct platform_device *pdev,
> +			     const char *name, int num)
> +{
> +	struct device_node *np = pdev->dev.of_node;
> +	int ret;
> +
> +	if (np)
> +		ret = platform_get_irq_byname(pdev, name);
> +	else
> +		ret = platform_get_irq(pdev, num);
> +
> +	return ret;
> +}
> +
>  static int dwc3_qcom_setup_irq(struct platform_device *pdev)
>  {
>  	struct dwc3_qcom *qcom = platform_get_drvdata(pdev);
> +	const struct dwc3_acpi_pdata *pdata = qcom->acpi_pdata;
>  	int irq, ret;
> -
> -	irq = platform_get_irq_byname(pdev, "hs_phy_irq");
> +	irq = dwc3_qcom_get_irq(pdev, "hs_phy_irq",
> +				pdata ? pdata->hs_phy_irq_index : -1);
>  	if (irq > 0) {
>  		/* Keep wakeup interrupts disabled until suspend */
>  		irq_set_status_flags(irq, IRQ_NOAUTOEN);
> @@ -320,7 +352,8 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev)
>  		qcom->hs_phy_irq = irq;
>  	}
>  
> -	irq = platform_get_irq_byname(pdev, "dp_hs_phy_irq");
> +	irq = dwc3_qcom_get_irq(pdev, "dp_hs_phy_irq",
> +				pdata ? pdata->dp_hs_phy_irq_index : -1);
>  	if (irq > 0) {
>  		irq_set_status_flags(irq, IRQ_NOAUTOEN);
>  		ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
> @@ -334,7 +367,8 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev)
>  		qcom->dp_hs_phy_irq = irq;
>  	}
>  
> -	irq = platform_get_irq_byname(pdev, "dm_hs_phy_irq");
> +	irq = dwc3_qcom_get_irq(pdev, "dm_hs_phy_irq",
> +				pdata ? pdata->dm_hs_phy_irq_index : -1);
>  	if (irq > 0) {
>  		irq_set_status_flags(irq, IRQ_NOAUTOEN);
>  		ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
> @@ -348,7 +382,8 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev)
>  		qcom->dm_hs_phy_irq = irq;
>  	}
>  
> -	irq = platform_get_irq_byname(pdev, "ss_phy_irq");
> +	irq = dwc3_qcom_get_irq(pdev, "ss_phy_irq",
> +				pdata ? pdata->ss_phy_irq_index : -1);
>  	if (irq > 0) {
>  		irq_set_status_flags(irq, IRQ_NOAUTOEN);
>  		ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
> @@ -371,11 +406,11 @@ static int dwc3_qcom_clk_init(struct dwc3_qcom *qcom, int count)
>  	struct device_node	*np = dev->of_node;
>  	int			i;
>  
> -	qcom->num_clocks = count;
> -
> -	if (!count)
> +	if (!np || !count)
>  		return 0;
>  
> +	qcom->num_clocks = count;
> +
>  	qcom->clks = devm_kcalloc(dev, qcom->num_clocks,
>  				  sizeof(struct clk *), GFP_KERNEL);
>  	if (!qcom->clks)
> @@ -409,12 +444,103 @@ static int dwc3_qcom_clk_init(struct dwc3_qcom *qcom, int count)
>  	return 0;
>  }
>  
> -static int dwc3_qcom_probe(struct platform_device *pdev)
> +static int dwc3_qcom_acpi_register_core(struct platform_device *pdev)
>  {
> +	struct dwc3_qcom 	*qcom = platform_get_drvdata(pdev);
> +	struct device		*dev = &pdev->dev;
> +	struct resource		*res, *child_res = NULL;
> +	int			irq;
> +	int			ret;
> +
> +	qcom->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
> +	if (!qcom->dwc3)
> +		return -ENOMEM;
> +
> +	qcom->dwc3->dev.parent = dev;
> +	qcom->dwc3->dev.type = dev->type;
> +	qcom->dwc3->dev.dma_mask = dev->dma_mask;
> +	qcom->dwc3->dev.dma_parms = dev->dma_parms;
> +	qcom->dwc3->dev.coherent_dma_mask = dev->coherent_dma_mask;
> +
> +	child_res = kcalloc(2, sizeof(*child_res), GFP_KERNEL);
> +	if (!child_res)
> +		return -ENOMEM;
> +
> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	if (!res) {
> +		dev_err(&pdev->dev, "failed to get memory resource\n");
> +		ret = -ENODEV;
> +		goto out;
> +	}
> +
> +	child_res[0].flags = res->flags;
> +	child_res[0].start = res->start;
> +	child_res[0].end = child_res[0].start +
> +		qcom->acpi_pdata->dwc3_core_base_size;
> +
> +	irq = platform_get_irq(pdev, 0);
> +	child_res[1].flags = IORESOURCE_IRQ;
> +	child_res[1].start = child_res[1].end = irq;
> +
> +	ret = platform_device_add_resources(qcom->dwc3, child_res, 2);
> +	if (ret) {
> +		dev_err(&pdev->dev, "failed to add resources\n");
> +		goto out;
> +	}
> +
> +	ret = platform_device_add(qcom->dwc3);
> +	if (ret)
> +		dev_err(&pdev->dev, "failed to add device\n");
> +
> +out:
> +	kfree(child_res);
> +	return ret;
> +}
> +
> +static int dwc3_qcom_of_register_core(struct platform_device *pdev)
> +{
> +	struct dwc3_qcom 	*qcom = platform_get_drvdata(pdev);
>  	struct device_node	*np = pdev->dev.of_node, *dwc3_np;
>  	struct device		*dev = &pdev->dev;
> +	int			ret;
> +
> +	dwc3_np = of_get_child_by_name(np, "dwc3");
> +	if (!dwc3_np) {
> +		dev_err(dev, "failed to find dwc3 core child\n");
> +		return -ENODEV;
> +	}
> +
> +	ret = of_platform_populate(np, NULL, NULL, dev);
> +	if (ret) {
> +		dev_err(dev, "failed to register dwc3 core - %d\n", ret);
> +		return ret;
> +	}
> +
> +	qcom->dwc3 = of_find_device_by_node(dwc3_np);
> +	if (!qcom->dwc3) {
> +		dev_err(dev, "failed to get dwc3 platform device\n");
> +		return -ENODEV;
> +	}
> +
> +	return 0;
> +}
> +
> +static const struct dwc3_acpi_pdata sdm845_acpi_pdata = {
> +	.qscratch_base_offset = SDM845_QSCRATCH_BASE_OFFSET,
> +	.qscratch_base_size = SDM845_QSCRATCH_SIZE,
> +	.dwc3_core_base_size = SDM845_DWC3_CORE_SIZE,
> +	.hs_phy_irq_index = 1,
> +	.dp_hs_phy_irq_index = 4,
> +	.dm_hs_phy_irq_index = 3,
> +	.ss_phy_irq_index = 2
> +};
> +
> +static int dwc3_qcom_probe(struct platform_device *pdev)
> +{
> +	struct device_node	*np = pdev->dev.of_node;
> +	struct device		*dev = &pdev->dev;
>  	struct dwc3_qcom	*qcom;
> -	struct resource		*res;
> +	struct resource		*res, *parent_res = NULL;
>  	int			ret, i;
>  	bool			ignore_pipe_clk;
>  
> @@ -425,6 +551,14 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
>  	platform_set_drvdata(pdev, qcom);
>  	qcom->dev = &pdev->dev;
>  
> +	if (ACPI_HANDLE(dev)) {
> +		qcom->acpi_pdata = acpi_device_get_match_data(dev);
> +		if (!qcom->acpi_pdata) {
> +			dev_err(&pdev->dev, "no supporting ACPI device data\n");
> +			return -EINVAL;
> +		}
> +	}
> +
>  	qcom->resets = devm_reset_control_array_get_optional_exclusive(dev);
>  	if (IS_ERR(qcom->resets)) {
>  		ret = PTR_ERR(qcom->resets);
> @@ -454,7 +588,21 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
>  	}
>  
>  	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> -	qcom->qscratch_base = devm_ioremap_resource(dev, res);
> +
> +	if (np) {
> +		parent_res = res;
> +	} else {
> +		parent_res = kmemdup(res, sizeof(struct resource), GFP_KERNEL);
> +		if (!parent_res)
> +			return -ENOMEM;
> +
> +		parent_res->start = res->start +
> +			qcom->acpi_pdata->qscratch_base_offset;
> +		parent_res->end = parent_res->start +
> +			qcom->acpi_pdata->qscratch_base_size;
> +	}
> +
> +	qcom->qscratch_base = devm_ioremap_resource(dev, parent_res);
>  	if (IS_ERR(qcom->qscratch_base)) {
>  		dev_err(dev, "failed to map qscratch, err=%d\n", ret);
>  		ret = PTR_ERR(qcom->qscratch_base);
> @@ -462,13 +610,8 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
>  	}
>  
>  	ret = dwc3_qcom_setup_irq(pdev);
> -	if (ret)
> -		goto clk_disable;
> -
> -	dwc3_np = of_get_child_by_name(np, "dwc3");
> -	if (!dwc3_np) {
> -		dev_err(dev, "failed to find dwc3 core child\n");
> -		ret = -ENODEV;
> +	if (ret) {
> +		dev_err(dev, "failed to setup IRQs, err=%d\n", ret);
>  		goto clk_disable;
>  	}
>  
> @@ -481,16 +624,13 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
>  	if (ignore_pipe_clk)
>  		dwc3_qcom_select_utmi_clk(qcom);
>  
> -	ret = of_platform_populate(np, NULL, NULL, dev);
> -	if (ret) {
> -		dev_err(dev, "failed to register dwc3 core - %d\n", ret);
> -		goto clk_disable;
> -	}
> +	if (np)
> +		ret = dwc3_qcom_of_register_core(pdev);
> +	else
> +		ret = dwc3_qcom_acpi_register_core(pdev);
>  
> -	qcom->dwc3 = of_find_device_by_node(dwc3_np);
> -	if (!qcom->dwc3) {
> -		dev_err(&pdev->dev, "failed to get dwc3 platform device\n");
> -		ret = -ENODEV;
> +	if (ret) {
> +		dev_err(dev, "failed to register DWC3 Core, err=%d\n", ret);
>  		goto depopulate;
>  	}
>  
> @@ -514,7 +654,10 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
>  	return 0;
>  
>  depopulate:
> -	of_platform_depopulate(&pdev->dev);
> +	if (np)
> +		of_platform_depopulate(&pdev->dev);
> +	else
> +		platform_device_put(pdev);
>  clk_disable:
>  	for (i = qcom->num_clocks - 1; i >= 0; i--) {
>  		clk_disable_unprepare(qcom->clks[i]);
> @@ -601,6 +744,12 @@ static const struct of_device_id dwc3_qcom_of_match[] = {
>  };
>  MODULE_DEVICE_TABLE(of, dwc3_qcom_of_match);
>  
> +static const struct acpi_device_id dwc3_qcom_acpi_match[] = {
> +	{ "QCOM2430", (unsigned long)&sdm845_acpi_pdata },
> +	{ },
> +};
> +MODULE_DEVICE_TABLE(acpi, dwc3_qcom_acpi_match);
> +
>  static struct platform_driver dwc3_qcom_driver = {
>  	.probe		= dwc3_qcom_probe,
>  	.remove		= dwc3_qcom_remove,
> @@ -608,6 +757,7 @@ static struct platform_driver dwc3_qcom_driver = {
>  		.name	= "dwc3-qcom",
>  		.pm	= &dwc3_qcom_dev_pm_ops,
>  		.of_match_table	= dwc3_qcom_of_match,
> +		.acpi_match_table = ACPI_PTR(dwc3_qcom_acpi_match),
>  	},
>  };
>  

-- 
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

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Re: [PATCH v4 4/6] usb: dwc3: qcom: Add support for booting with ACPI

[Felipe Balbi]

[-- Attachment #1.1: Type: text/plain, Size: 1891 bytes --]

Hi,

Lee Jones <lee.jones@linaro.org> writes:
>> In Linux, the DWC3 core exists as its own independent platform device.
>> Thus when describing relationships in Device Tree, the current default
>> boot configuration table option, the DWC3 core often resides as a child
>> of the platform specific node.  Both of which are given their own
>> address space descriptions and the drivers can be mostly agnostic to
>> each other.
>> 
>> However, other Operating Systems have taken a more monolithic approach,
>> which is evident in the configuration ACPI tables for the Qualcomm
>> Snapdragon SDM850, where all DWC3 (core and platform) components are
>> described under a single IO memory region.
>> 
>> To ensure successful booting using the supplied ACPI tables, we need to
>> devise a way to chop up the address regions provided and subsequently
>> register the DWC3 core with the resultant information, which is
>> precisely what this patch aims to achieve.
>> 
>> Signed-off-by: Lee Jones <lee.jones@linaro.org>
>> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>> ---
>>  drivers/usb/dwc3/Kconfig     |   2 +-
>>  drivers/usb/dwc3/dwc3-qcom.c | 206 ++++++++++++++++++++++++++++++-----
>>  2 files changed, 179 insertions(+), 29 deletions(-)
>
> I'm starting to get a little twitchy about these patches now.  Due to
> the release cadence of the larger Linux distros, it's pretty important
> that these changes land in v5.3.  Without them, it is impossible to
> install Linux on some pretty high profile emerging platforms.
>
> It's already -rc5 and I'm concerned that we're going to miss the
> merge-window.  Would you be kind enough to review these patches
> please?  The Pinctrl and I2C parts of the set have already been
> merged.

I don't seem to have this series in my inbox. This is the only email I
have in this series.

-- 
balbi

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Re: [PATCH v4 4/6] usb: dwc3: qcom: Add support for booting with ACPI

[Lee Jones]

On Mon, 17 Jun 2019, Felipe Balbi wrote:

> Hi,
> 
> Lee Jones <lee.jones@linaro.org> writes:
> >> In Linux, the DWC3 core exists as its own independent platform device.
> >> Thus when describing relationships in Device Tree, the current default
> >> boot configuration table option, the DWC3 core often resides as a child
> >> of the platform specific node.  Both of which are given their own
> >> address space descriptions and the drivers can be mostly agnostic to
> >> each other.
> >> 
> >> However, other Operating Systems have taken a more monolithic approach,
> >> which is evident in the configuration ACPI tables for the Qualcomm
> >> Snapdragon SDM850, where all DWC3 (core and platform) components are
> >> described under a single IO memory region.
> >> 
> >> To ensure successful booting using the supplied ACPI tables, we need to
> >> devise a way to chop up the address regions provided and subsequently
> >> register the DWC3 core with the resultant information, which is
> >> precisely what this patch aims to achieve.
> >> 
> >> Signed-off-by: Lee Jones <lee.jones@linaro.org>
> >> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> >> ---
> >>  drivers/usb/dwc3/Kconfig     |   2 +-
> >>  drivers/usb/dwc3/dwc3-qcom.c | 206 ++++++++++++++++++++++++++++++-----
> >>  2 files changed, 179 insertions(+), 29 deletions(-)
> >
> > I'm starting to get a little twitchy about these patches now.  Due to
> > the release cadence of the larger Linux distros, it's pretty important
> > that these changes land in v5.3.  Without them, it is impossible to
> > install Linux on some pretty high profile emerging platforms.
> >
> > It's already -rc5 and I'm concerned that we're going to miss the
> > merge-window.  Would you be kind enough to review these patches
> > please?  The Pinctrl and I2C parts of the set have already been
> > merged.
> 
> I don't seem to have this series in my inbox. This is the only email I
> have in this series.

I did wonder, which is why I made sure I sent this to your Intel
address as well.  Is your @kernel.org address broken?

Will re-send the patches to your Intel address, give me a few
minutes.

-- 
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

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Re: [PATCH v4 4/6] usb: dwc3: qcom: Add support for booting with ACPI

[Felipe Balbi]

[-- Attachment #1.1: Type: text/plain, Size: 2413 bytes --]


Hi,

Lee Jones <lee.jones@linaro.org> writes:
> On Mon, 17 Jun 2019, Felipe Balbi wrote:
>
>> Hi,
>> 
>> Lee Jones <lee.jones@linaro.org> writes:
>> >> In Linux, the DWC3 core exists as its own independent platform device.
>> >> Thus when describing relationships in Device Tree, the current default
>> >> boot configuration table option, the DWC3 core often resides as a child
>> >> of the platform specific node.  Both of which are given their own
>> >> address space descriptions and the drivers can be mostly agnostic to
>> >> each other.
>> >> 
>> >> However, other Operating Systems have taken a more monolithic approach,
>> >> which is evident in the configuration ACPI tables for the Qualcomm
>> >> Snapdragon SDM850, where all DWC3 (core and platform) components are
>> >> described under a single IO memory region.
>> >> 
>> >> To ensure successful booting using the supplied ACPI tables, we need to
>> >> devise a way to chop up the address regions provided and subsequently
>> >> register the DWC3 core with the resultant information, which is
>> >> precisely what this patch aims to achieve.
>> >> 
>> >> Signed-off-by: Lee Jones <lee.jones@linaro.org>
>> >> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>> >> ---
>> >>  drivers/usb/dwc3/Kconfig     |   2 +-
>> >>  drivers/usb/dwc3/dwc3-qcom.c | 206 ++++++++++++++++++++++++++++++-----
>> >>  2 files changed, 179 insertions(+), 29 deletions(-)
>> >
>> > I'm starting to get a little twitchy about these patches now.  Due to
>> > the release cadence of the larger Linux distros, it's pretty important
>> > that these changes land in v5.3.  Without them, it is impossible to
>> > install Linux on some pretty high profile emerging platforms.
>> >
>> > It's already -rc5 and I'm concerned that we're going to miss the
>> > merge-window.  Would you be kind enough to review these patches
>> > please?  The Pinctrl and I2C parts of the set have already been
>> > merged.
>> 
>> I don't seem to have this series in my inbox. This is the only email I
>> have in this series.
>
> I did wonder, which is why I made sure I sent this to your Intel
> address as well.  Is your @kernel.org address broken?

not really, that drops in a valid inbox. I didn't receive it in either,
however. :-s

> Will re-send the patches to your Intel address, give me a few
> minutes.

Thanks.

-- 
balbi

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[PATCH v4 5/6] usb: dwc3: qcom: Start USB in 'host mode' on the SDM845

[Lee Jones]

When booting with Device Tree, the current default boot configuration
table option, the request to boot via 'host mode' comes from the
'dr_mode' property.  A property of the same name can be used inside
ACPI tables too.  However it is missing from the SDM845's ACPI tables
so we have to supply this information using Platform Device Properties
instead.

This does not change the behaviour of any currently supported devices.
The property is only set on ACPI enabled platforms, thus for H/W
booting DT, unless a 'dr_mode' property is present, the default is
still OTG (On-The-Go) as per [0].  Any new ACPI devices added will
also be able to over-ride this implementation by providing a 'dr_mode'
property in their ACPI tables.  In cases where 'dr_mode' is omitted
from the tables AND 'host mode' should not be the default (very
unlikely), then we will have to add some way of choosing between them
at run time - most likely by ACPI HID.

[0] Documentation/devicetree/bindings/usb/generic.txt

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 drivers/usb/dwc3/dwc3-qcom.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
index 1e1f12b7991d..55ba04254e38 100644
--- a/drivers/usb/dwc3/dwc3-qcom.c
+++ b/drivers/usb/dwc3/dwc3-qcom.c
@@ -444,6 +444,11 @@ static int dwc3_qcom_clk_init(struct dwc3_qcom *qcom, int count)
 	return 0;
 }
 
+static const struct property_entry dwc3_qcom_acpi_properties[] = {
+	PROPERTY_ENTRY_STRING("dr_mode", "host"),
+	{}
+};
+
 static int dwc3_qcom_acpi_register_core(struct platform_device *pdev)
 {
 	struct dwc3_qcom 	*qcom = platform_get_drvdata(pdev);
@@ -488,6 +493,13 @@ static int dwc3_qcom_acpi_register_core(struct platform_device *pdev)
 		goto out;
 	}
 
+	ret = platform_device_add_properties(qcom->dwc3,
+					     dwc3_qcom_acpi_properties);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "failed to add properties\n");
+		goto out;
+	}
+
 	ret = platform_device_add(qcom->dwc3);
 	if (ret)
 		dev_err(&pdev->dev, "failed to add device\n");
-- 
2.17.1


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[PATCH v4 6/6] usb: dwc3: qcom: Improve error handling

[Lee Jones]

dwc3_qcom_clk_init() is called with of_count_phandle_with_args() as an
argument.  If of_count_phandle_with_args() returns an error, the number
of clocks will be a negative value and will lead to undefined behaviour.

Ensure we check for an error before attempting to blindly use the value.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 drivers/usb/dwc3/dwc3-qcom.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
index 55ba04254e38..e4dac82abd7d 100644
--- a/drivers/usb/dwc3/dwc3-qcom.c
+++ b/drivers/usb/dwc3/dwc3-qcom.c
@@ -409,6 +409,9 @@ static int dwc3_qcom_clk_init(struct dwc3_qcom *qcom, int count)
 	if (!np || !count)
 		return 0;
 
+	if (count < 0)
+		return count;
+
 	qcom->num_clocks = count;
 
 	qcom->clks = devm_kcalloc(dev, qcom->num_clocks,
-- 
2.17.1


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