From: Andre Przywara <andre.przywara@arm.com>
To: Sudeep Holla <sudeep.holla@arm.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
peng.fan@nxp.com, f.fainelli@gmail.com, festevam@gmail.com,
jassisinghbrar@gmail.com, linux-kernel@vger.kernel.org,
robh+dt@kernel.org, linux-imx@nxp.com, kernel@pengutronix.de,
van.freenix@gmail.com, shawnguo@kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH V2 1/2] DT: mailbox: add binding doc for the ARM SMC mailbox
Date: Thu, 20 Jun 2019 17:13:19 +0100 [thread overview]
Message-ID: <20190620171319.13dae226@donnerap.cambridge.arm.com> (raw)
In-Reply-To: <20190620092241.GC1248@e107155-lin>
On Thu, 20 Jun 2019 10:22:41 +0100
Sudeep Holla <sudeep.holla@arm.com> wrote:
> On Mon, Jun 03, 2019 at 04:30:04PM +0800, peng.fan@nxp.com wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > The ARM SMC mailbox binding describes a firmware interface to trigger
> > actions in software layers running in the EL2 or EL3 exception levels.
> > The term "ARM" here relates to the SMC instruction as part of the ARM
> > instruction set, not as a standard endorsed by ARM Ltd.
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >
> > V2:
> > Introduce interrupts as a property.
> >
> > V1:
> > arm,func-ids is still kept as an optional property, because there is no
> > defined SMC funciton id passed from SCMI. So in my test, I still use
> > arm,func-ids for ARM SIP service.
> >
> > .../devicetree/bindings/mailbox/arm-smc.txt | 101 +++++++++++++++++++++
> > 1 file changed, 101 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/mailbox/arm-smc.txt
> >
> > diff --git a/Documentation/devicetree/bindings/mailbox/arm-smc.txt b/Documentation/devicetree/bindings/mailbox/arm-smc.txt
> > new file mode 100644
> > index 000000000000..401887118c09
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mailbox/arm-smc.txt
> > @@ -0,0 +1,101 @@
> > +ARM SMC Mailbox Interface
> > +=========================
> > +
> > +This mailbox uses the ARM smc (secure monitor call) instruction to trigger
> > +a mailbox-connected activity in firmware, executing on the very same core
> > +as the caller. By nature this operation is synchronous and this mailbox
> > +provides no way for asynchronous messages to be delivered the other way
> > +round, from firmware to the OS, but asynchronous notification could also
> > +be supported. However the value of r0/w0/x0 the firmware returns after
> > +the smc call is delivered as a received message to the mailbox framework,
> > +so a synchronous communication can be established, for a asynchronous
> > +notification, no value will be returned. The exact meaning of both the
> > +action the mailbox triggers as well as the return value is defined by
> > +their users and is not subject to this binding.
> > +
> > +One use case of this mailbox is the SCMI interface, which uses shared memory
> > +to transfer commands and parameters, and a mailbox to trigger a function
> > +call. This allows SoCs without a separate management processor (or when
> > +such a processor is not available or used) to use this standardized
> > +interface anyway.
> > +
> > +This binding describes no hardware, but establishes a firmware interface.
> > +Upon receiving an SMC using one of the described SMC function identifiers,
> > +the firmware is expected to trigger some mailbox connected functionality.
> > +The communication follows the ARM SMC calling convention[1].
> > +Firmware expects an SMC function identifier in r0 or w0. The supported
> > +identifiers are passed from consumers, or listed in the the arm,func-ids
> > +properties as described below. The firmware can return one value in
> > +the first SMC result register, it is expected to be an error value,
> > +which shall be propagated to the mailbox client.
> > +
> > +Any core which supports the SMC or HVC instruction can be used, as long as
> > +a firmware component running in EL3 or EL2 is handling these calls.
> > +
> > +Mailbox Device Node:
> > +====================
> > +
> > +This node is expected to be a child of the /firmware node.
> > +
> > +Required properties:
> > +--------------------
> > +- compatible: Shall be "arm,smc-mbox"
> > +- #mbox-cells Shall be 1 - the index of the channel needed.
> > +- arm,num-chans The number of channels supported.
> > +- method: A string, either:
> > + "hvc": if the driver shall use an HVC call, or
> > + "smc": if the driver shall use an SMC call.
> > +
> > +Optional properties:
> > +- arm,func-ids An array of 32-bit values specifying the function
> > + IDs used by each mailbox channel. Those function IDs
> > + follow the ARM SMC calling convention standard [1].
> > + There is one identifier per channel and the number
> > + of supported channels is determined by the length
> > + of this array.
> > +- interrupts SPI interrupts may be listed for notification,
> > + each channel should use a dedicated interrupt
> > + line.
> > +
>
> I think SMC mailbox as mostly unidirectional/Tx only channel. And the
> interrupts here as stated are for notifications, so I prefer to keep
> them separate channel. I assume SMC call return indicates completion.
> Or do you plan to use these interrupts as the indication for completion
> of the command? I see in patch 2/2 the absence of IRQ is anyway dealt
> the way I mention above.
>
> Does it make sense or am I missing something here ?
I think you are right. From a mailbox point of view "completion" means
that the trigger has reached the other side. A returning smc call is a
perfect indication of this fact. Whether the action triggered by this
mailbox command has completed is a totally separate question and out of
the scope of the mailbox. This should be handled by a higher level
protocol (SCPI in this case). Which could mean that this employs a
separate return mailbox channel, which is RX only and implemented by
interrupts. Which could or could not be part of this driver.
Cheers,
Andre
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next prev parent reply other threads:[~2019-06-20 16:21 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-03 8:30 [PATCH V2 0/2] mailbox: arm: introduce smc triggered mailbox peng.fan
2019-06-03 8:30 ` [PATCH V2 1/2] DT: mailbox: add binding doc for the ARM SMC mailbox peng.fan
2019-06-03 16:22 ` Florian Fainelli
2019-06-03 16:56 ` Sudeep Holla
2019-06-03 17:18 ` Andre Przywara
2019-06-06 2:51 ` Florian Fainelli
2019-06-06 3:24 ` Peng Fan
2019-06-20 9:22 ` Sudeep Holla
2019-06-20 16:13 ` Andre Przywara [this message]
2019-06-20 16:27 ` Jassi Brar
2019-07-08 22:19 ` Rob Herring
2019-07-09 1:40 ` Peng Fan
2019-07-09 13:31 ` Rob Herring
2019-06-03 8:30 ` [PATCH V2 2/2] mailbox: introduce ARM SMC based mailbox peng.fan
2019-06-03 16:32 ` Florian Fainelli
2019-06-06 3:35 ` Peng Fan
2019-06-06 13:20 ` Andre Przywara
2019-06-10 1:32 ` Peng Fan
2019-06-10 10:00 ` Andre Przywara
2019-06-12 12:59 ` Peng Fan
2019-06-12 17:18 ` Andre Przywara
2019-06-20 9:23 ` Sudeep Holla
2019-06-20 10:21 ` Peng Fan
2019-06-20 11:15 ` Sudeep Holla
2019-06-25 7:28 ` Peng Fan
2019-06-20 16:50 ` Jassi Brar
2019-06-25 7:20 ` Peng Fan
2019-06-26 17:05 ` André Przywara
2019-06-26 17:07 ` Florian Fainelli
2019-06-25 7:30 ` Peng Fan
2019-06-25 14:36 ` Jassi Brar
2019-06-26 13:31 ` Peng Fan
2019-06-26 16:31 ` Jassi Brar
2019-06-26 16:44 ` Florian Fainelli
2019-06-26 17:09 ` Sudeep Holla
2019-06-27 18:10 ` Florian Fainelli
2019-06-26 18:27 ` Jassi Brar
2019-06-27 9:09 ` Sudeep Holla
2019-06-27 15:32 ` Jassi Brar
2019-06-27 17:07 ` Sudeep Holla
2019-06-26 17:02 ` Sudeep Holla
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