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Tue, 16 Jul 2019 03:25:58 -0500 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 16 Jul 2019 03:25:58 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 16 Jul 2019 03:25:58 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x6G8PuBn103858; Tue, 16 Jul 2019 03:25:56 -0500 From: Peter Ujfalusi To: Subject: [PATCH v5 0/3] dmaengine: ti: edma: Polled completion support Date: Tue, 16 Jul 2019 11:26:52 +0300 Message-ID: <20190716082655.1620-1-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.22.0 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190716_012607_763716_7C76D48D X-CRM114-Status: GOOD ( 12.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dmaengine@vger.kernel.org, dan.j.williams@intel.com, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Changes since v4: - Split the DMA_COMPLETE and !txstate check as Vinod suggested Change since v3: - fix DMA pointer tracking for memcpy - completion polling is only done when it is asked by not providing DMA_PREP_INTERRUPT for memcpy Changes since v2: - Fix typo in the comment for patch 0 Changes since v1: - Cleanup patch for the array register handling - typo fixed in patch2 commit message The code around the array register access was pretty confusing for the first look, so clean them up first then use the cleaner way in the polled handling. When a DMA client driver does not set the DMA_PREP_INTERRUPT because it does not want to use interrupts for DMA completion or because it can not rely on DMA interrupts due to executing the memcpy when interrupts are disabled it will poll the status of the transfer. Since we can not tell from any EDMA register that the transfer is completed, we can only know that the paRAM set has been sent to TPTC for processing we need to check the residue of the transfer, if it is 0 then the transfer is completed. The polled completion can bve tested by applying: https://patchwork.kernel.org/patch/10966499/ Enabling the memcpy for EDMA and run the dmatest with polled = 1. Or, enable the EDMA memcpy support and boot up any dra7 family device with display enabled. The workaround for DMM errata i878 uses polled DMA memcpy. Regards, Peter --- Peter Ujfalusi (3): dmaengine: ti: edma: Clean up the 2x32bit array register accesses dmaengine: ti: edma: Correct the residue calculation (fix for memcpy) dmaengine: ti: edma: Support for polled (memcpy) completion drivers/dma/ti/edma.c | 174 ++++++++++++++++++++++++++++-------------- 1 file changed, 117 insertions(+), 57 deletions(-) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel