From: Suman Anna <s-anna@ti.com>
To: Tero Kristo <t-kristo@ti.com>, Nishanth Menon <nm@ti.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] arm64: dts: ti: k3-am65-main: Add hwspinlock node
Date: Mon, 22 Jul 2019 14:05:38 -0500 [thread overview]
Message-ID: <20190722190539.27816-2-s-anna@ti.com> (raw)
In-Reply-To: <20190722190539.27816-1-s-anna@ti.com>
The Main NavSS block on AM65x SoCs contains a HwSpinlock IP instance
that is similar to the IP on some OMAP SoCs. Add the DT node for this
on AM65x SoCs. The node is present within the NavSS block, and is
added as a child node under the cbass_main_navss interconnect node.
Signed-off-by: Suman Anna <s-anna@ti.com>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index ca70ff73f171..8413e80f9d3a 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -413,6 +413,12 @@
ti,sci-rm-range-vint = <0x0>;
ti,sci-rm-range-global-event = <0x1>;
};
+
+ hwspinlock: spinlock@30e00000 {
+ compatible = "ti,am654-hwspinlock";
+ reg = <0x00 0x30e00000 0x00 0x1000>;
+ #hwlock-cells = <1>;
+ };
};
main_gpio0: main_gpio0@600000 {
--
2.22.0
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next prev parent reply other threads:[~2019-07-22 19:06 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-22 19:05 [PATCH 0/2] Add HwSpinlock nodes for TI K3 SoCs Suman Anna
2019-07-22 19:05 ` Suman Anna [this message]
2019-07-22 19:05 ` [PATCH 2/2] arm64: dts: ti: k3-j721e-main: Add hwspinlock node Suman Anna
2019-08-27 22:34 ` [PATCH 0/2] Add HwSpinlock nodes for TI K3 SoCs Suman Anna
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