From: Yong Liang <yong.liang@mediatek.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
<matthias.bgg@gmail.com>, <robh+dt@kernel.org>,
<mark.rutland@arm.com>, <drinkcat@chromium.org>,
<weiyi.lu@mediatek.com>, <jamesjj.liao@mediatek.com>,
<jasu@njomotys.info>, <owen.chen@mediatek.com>,
<chunhui.dai@mediatek.com>, <erin.lo@mediatek.com>,
<eddie.huang@mediatek.com>
Cc: "yong.liang" <yong.liang@mediatek.com>,
linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4,1/2] arm64: dts: mt8183: Add reset-cells in infracfg
Date: Thu, 25 Jul 2019 16:20:01 +0800 [thread overview]
Message-ID: <20190725082002.17400-1-yong.liang@mediatek.com> (raw)
From: "yong.liang" <yong.liang@mediatek.com>
Include mt8183-reset.h and add reset-cells in infracfg in
dtsi file.
Signed-off-by: yong.liang <yong.liang@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 08274bfcebd8..2589e9461c6e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/mt8183-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/reset-controller/mt8183-resets.h>
/ {
compatible = "mediatek,mt8183";
@@ -194,6 +195,7 @@
compatible = "mediatek,mt8183-infracfg", "syscon";
reg = <0 0x10001000 0 0x1000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
apmixedsys: syscon@1000c000 {
--
2.18.0
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next reply other threads:[~2019-07-25 8:20 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-25 8:20 Yong Liang [this message]
2019-07-25 8:20 ` [PATCH v4,2/2] clk: reset: Modify reset-controller driver Yong Liang
2019-07-25 21:11 ` Stephen Boyd
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