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From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: Andrew Murray <andrew.murray@arm.com>
Cc: Al.Grant@arm.com, Suzuki K Poulose <suzuki.poulose@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	coresight@lists.linaro.org, Sudeep Holla <sudeep.holla@arm.com>,
	Leo Yan <leo.yan@linaro.org>,
	linux-arm-kernel@lists.infradead.org,
	Mike Leach <mike.leach@linaro.org>
Subject: Re: [PATCH v4 0/6] coresight: etm4x: save/restore ETMv4 context across CPU low power states
Date: Tue, 30 Jul 2019 14:12:20 -0600
Message-ID: <20190730201220.GA4878@xps15> (raw)
In-Reply-To: <20190730125157.884-1-andrew.murray@arm.com>

Hi Andrew,

On Tue, Jul 30, 2019 at 01:51:51PM +0100, Andrew Murray wrote:
> Some hardware will ignore bit TRCPDCR.PU which is used to signal
> to hardware that power should not be removed from the trace unit.
> Let's mitigate against this by conditionally saving and restoring
> the trace unit state when the CPU enters low power states.
> 
> This patchset introduces a firmware property named
> 'arm,coresight-needs-save-restore' - when this is present the
> hardware state will be conditionally saved and restored.
> 
> A module parameter 'pm_save_enable' is also introduced which can
> be configured to override the firmware property.
> 
> The hardware state is only ever saved and restored when a self-hosted
> coresight is in use.
> 
> Changes since v3:
> 
>  - Only save/restore when self-hosted is being used and detect this
>    without relying on the coresight registers (which may not be
>    available)
> 
>  - Only allocate memory for etmv4_save_state at probe time when
>    configuration indicates it may be used
> 
>  - Set pm_save_enable param to 0444 such that it is static after
>    boot
> 
>  - Save/restore TRCPDCR
> 
>  - Add missing comments to struct etm4_drvdata documentation
> 
>  - Rebased onto coresight/next (8f1f9857)
> 
> Changes since v2:
> 
>  - Move the PM notifier block from drvdata to file static
> 
>  - Add section names to document references
> 
>  - Add additional information to commit messages
> 
>  - Remove trcdvcvr and trcdvcmr from saved state and add a comment to
>    describe why
> 
>  - Ensure TRCPDCR_PU is set after restore and add a comment to explain
>    why we bother toggling TRCPDCR_PU on save/restore
> 
>  - Reword the pm_save_enable options and add comments
> 
>  - Miscellaneous style changes
> 
>  - Move device tree binding documentation to its own patch
> 
> Changes since v1:
> 
>  - Rebased onto coresight/next
> 
>  - Correcly pass bit number rather than BIT macro to coresight_timeout
> 
>  - Abort saving state if a timeout occurs
> 
>  - Fix completely broken pm_notify handling and unregister handler on error
> 
>  - Use state_needs_restore to ensure state is restored only once
> 
>  - Add module parameter description to existing boot_enable parameter
>    and use module_param instead of module_param_named
> 
>  - Add firmware bindings for coresight-needs-save-restore
> 
>  - Rename 'disable_pm_save' to 'pm_save_enable' which allows for
>    disabled, enabled or firmware
> 
>  - Update comment on etm4_os_lock, it incorrectly indicated that
>    the code unlocks the trace registers
> 
>  - Add comments to explain use of OS lock during save/restore
> 
>  - Fix incorrect error description whilst waiting for PM stable
> 
>  - Add WARN_ON_ONCE when cpu isn't as expected during save/restore
> 
>  - Various updates to commit messages
> 
> 
> Andrew Murray (6):
>   coresight: etm4x: remove superfluous setting of os_unlock
>   coresight: etm4x: use explicit barriers on enable/disable
>   coresight: etm4x: use module_param instead of module_param_named
>   coresight: etm4x: improve clarity of etm4_os_unlock comment

I have picked up the first 4 patches, so no need to send them with your next
revision.  Note that for patch 2/6 I have removed the "stable" tag as the patch
doesn't apply to any of the stable tree.  Since I have another one like that in
my tree I will rework both patches and send them directly to Greg for stable
consideration.

Thanks,
Mathieu


>   coresight: etm4x: save/restore state across CPU low power states
>   dt-bindings: arm: coresight: Add support for
>     coresight-needs-save-restore
> 
>  .../devicetree/bindings/arm/coresight.txt     |   3 +
>  drivers/hwtracing/coresight/coresight-etm4x.c | 346 +++++++++++++++++-
>  drivers/hwtracing/coresight/coresight-etm4x.h |  64 ++++
>  3 files changed, 406 insertions(+), 7 deletions(-)
> 
> -- 
> 2.21.0
> 

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  parent reply index

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-30 12:51 Andrew Murray
2019-07-30 12:51 ` [PATCH v4 1/6] coresight: etm4x: remove superfluous setting of os_unlock Andrew Murray
2019-07-30 12:51 ` [PATCH v4 2/6] coresight: etm4x: use explicit barriers on enable/disable Andrew Murray
2019-08-01 13:31   ` Sasha Levin
2019-08-01 14:48     ` Mathieu Poirier
2019-08-02 18:08   ` Sasha Levin
2019-07-30 12:51 ` [PATCH v4 3/6] coresight: etm4x: use module_param instead of module_param_named Andrew Murray
2019-08-02 10:23   ` Suzuki K Poulose
2019-07-30 12:51 ` [PATCH v4 4/6] coresight: etm4x: improve clarity of etm4_os_unlock comment Andrew Murray
2019-07-30 12:51 ` [PATCH v4 5/6] coresight: etm4x: save/restore state across CPU low power states Andrew Murray
2019-07-30 21:16   ` Mathieu Poirier
2019-07-30 21:45     ` Andrew Murray
2019-07-31  8:16       ` Mike Leach
2019-07-31  9:45         ` Andrew Murray
2019-08-02 10:54   ` Suzuki K Poulose
2019-08-14  9:12     ` Andrew Murray
2019-07-30 12:51 ` [PATCH v4 6/6] dt-bindings: arm: coresight: Add support for coresight-needs-save-restore Andrew Murray
2019-08-02 10:40   ` Suzuki K Poulose
2019-08-02 14:37     ` Andrew Murray
2019-08-04 13:13       ` Mathieu Poirier
2019-08-14 10:01         ` Andrew Murray
2019-08-14 11:06           ` Mike Leach
2019-08-14 12:35             ` Suzuki K Poulose
2019-08-14 12:49               ` Andrew Murray
2019-08-14 14:20               ` Mike Leach
2019-07-30 20:12 ` Mathieu Poirier [this message]
2019-07-30 21:46   ` [PATCH v4 0/6] coresight: etm4x: save/restore ETMv4 context across CPU low power states Andrew Murray

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