From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org, Yan Markman <ymarkman@marvell.com>,
Antoine Tenart <antoine.tenart@bootlin.com>,
Grzegorz Jaszczyk <jaz@semihalf.com>,
Gregory Clement <gregory.clement@bootlin.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Nadav Haklai <nadavh@marvell.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Stefan Chulski <stefanc@marvell.com>,
Marcin Wojtas <mw@semihalf.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 10/20] arm64: dts: marvell: Add AP807-quad cache description
Date: Tue, 6 Aug 2019 16:54:50 +0200 [thread overview]
Message-ID: <20190806145500.24109-11-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20190806145500.24109-1-miquel.raynal@bootlin.com>
From: Grzegorz Jaszczyk <jaz@semihalf.com>
Adding appropriate entries to device-tree allows the cache description
to show up in sysfs under: /sys/devices/system/cpu/cpuX/cache/.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
.../boot/dts/marvell/armada-ap807-quad.dtsi | 42 +++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi b/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi
index 65364691257d..840466e143b4 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi
@@ -22,6 +22,13 @@
enable-method = "psci";
#cooling-cells = <2>;
clocks = <&cpu_clk 0>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2_0>;
};
cpu1: cpu@1 {
device_type = "cpu";
@@ -30,6 +37,13 @@
enable-method = "psci";
#cooling-cells = <2>;
clocks = <&cpu_clk 0>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2_0>;
};
cpu2: cpu@100 {
device_type = "cpu";
@@ -38,6 +52,13 @@
enable-method = "psci";
#cooling-cells = <2>;
clocks = <&cpu_clk 1>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2_1>;
};
cpu3: cpu@101 {
device_type = "cpu";
@@ -46,6 +67,27 @@
enable-method = "psci";
#cooling-cells = <2>;
clocks = <&cpu_clk 1>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2_1>;
+ };
+
+ l2_0: l2-cache0 {
+ compatible = "cache";
+ cache-size = <0x80000>;
+ cache-line-size = <64>;
+ cache-sets = <512>;
+ };
+
+ l2_1: l2-cache1 {
+ compatible = "cache";
+ cache-size = <0x80000>;
+ cache-line-size = <64>;
+ cache-sets = <512>;
};
};
};
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-08-06 14:56 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-06 14:54 [PATCH 00/20] Add new Marvell CN9130 SoC support Miquel Raynal
2019-08-06 14:54 ` [PATCH 01/20] arm64: dts: marvell: Enumerate the first AP806 syscon Miquel Raynal
2019-08-06 14:54 ` [PATCH 02/20] arm64: dts: marvell: Add AP806-dual missing CPU clocks Miquel Raynal
2019-08-06 14:54 ` [PATCH 03/20] dt-bindings: ap80x: replace AP806 with AP80x Miquel Raynal
2019-08-21 19:32 ` Rob Herring
2019-08-06 14:54 ` [PATCH 04/20] MAINTAINERS: Add new Marvell CN9130-based files to track Miquel Raynal
2019-08-06 14:54 ` [PATCH 05/20] arm64: dts: marvell: Prepare the introduction of AP807 based SoCs Miquel Raynal
2019-08-27 15:20 ` Gregory CLEMENT
2019-08-06 14:54 ` [PATCH 06/20] arm64: dts: marvell: Move clocks to AP806 specific file Miquel Raynal
2019-08-06 14:54 ` [PATCH 07/20] arm64: dts: marvell: Add support for AP807/AP807-quad Miquel Raynal
2019-08-06 14:54 ` [PATCH 08/20] arm64: dts: marvell: Add AP806-dual cache description Miquel Raynal
2019-08-06 14:54 ` [PATCH 09/20] arm64: dts: marvell: Add AP806-quad " Miquel Raynal
2019-08-06 14:54 ` Miquel Raynal [this message]
2019-08-06 14:54 ` [PATCH 11/20] arm64: dts: marvell: Fix CP110 NAND controller node multi-line comment alignment Miquel Raynal
2019-08-06 14:54 ` [PATCH 12/20] arm64: dts: marvell: Prepare the introduction of CP115 Miquel Raynal
2019-08-06 14:54 ` [PATCH 13/20] arm64: dts: marvell: Drop PCIe I/O ranges from CP11x file Miquel Raynal
2019-08-06 14:54 ` [PATCH 14/20] arm64: dts: marvell: Externalize PCIe macros " Miquel Raynal
2019-08-06 14:54 ` [PATCH 15/20] arm64: dts: marvell: Add support for CP115 Miquel Raynal
2019-08-06 14:54 ` [PATCH 16/20] dt-bindings: marvell: Declare the CN913x SoC compatibles Miquel Raynal
2019-08-21 19:37 ` Rob Herring
2019-08-24 11:30 ` Miquel Raynal
2019-08-06 14:54 ` [PATCH 17/20] arm64: dts: marvell: Add support for Marvell CN9130 SoC support Miquel Raynal
2019-08-06 14:54 ` [PATCH 18/20] arm64: dts: marvell: Add support for Marvell CN9130-DB Miquel Raynal
2019-08-06 14:54 ` [PATCH 19/20] arm64: dts: marvell: Add support for Marvell CN9131-DB Miquel Raynal
2019-08-06 14:55 ` [PATCH 20/20] arm64: dts: marvell: Add support for Marvell CN9132-DB Miquel Raynal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190806145500.24109-11-miquel.raynal@bootlin.com \
--to=miquel.raynal@bootlin.com \
--cc=antoine.tenart@bootlin.com \
--cc=devicetree@vger.kernel.org \
--cc=gregory.clement@bootlin.com \
--cc=jaz@semihalf.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=mark.rutland@arm.com \
--cc=maxime.chevallier@bootlin.com \
--cc=mw@semihalf.com \
--cc=nadavh@marvell.com \
--cc=robh+dt@kernel.org \
--cc=stefanc@marvell.com \
--cc=thomas.petazzoni@bootlin.com \
--cc=ymarkman@marvell.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).