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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Andrew Lunn <andrew@lunn.ch>, Jason Cooper <jason@lakedaemon.net>,
	devicetree@vger.kernel.org,
	Antoine Tenart <antoine.tenart@bootlin.com>,
	Grzegorz Jaszczyk <jaz@semihalf.com>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Russell King <linux@armlinux.org.uk>,
	Maxime Chevallier <maxime.chevallier@bootlin.com>,
	Nadav Haklai <nadavh@marvell.com>,
	Rob Herring <robh+dt@kernel.org>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	linux-arm-kernel@lists.infradead.org,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Subject: Re: [PATCH v3 00/19] Enhance CP110 COMPHY support
Date: Fri, 23 Aug 2019 09:33:24 +0200
Message-ID: <20190823093324.2d7da1f4@xps13> (raw)
In-Reply-To: <4e1c4d27-3676-5efa-1126-8149a8635eb5@ti.com>

Hi Kishon,

Kishon Vijay Abraham I <kishon@ti.com> wrote on Fri, 23 Aug 2019
08:46:14 +0530:

> On 31/07/19 5:51 PM, Miquel Raynal wrote:
> > Armada CP110 have a COMPHY IP which supports configuring SERDES lanes
> > in one mode, either:
> > - SATA
> > - USB3 host
> > - PCIe (several width)
> > - Ethernet (several modes)
> > 
> > As of today, only a few Ethernet modes are supported and the code is
> > embedded in the Linux driver. A more complete COMPHY driver that can
> > be used by both Linux and U-Boot is embedded in the firmware and can
> > be run through SMC calls.
> > 
> > First the current COMPHY driver is updated to use SMC calls but
> > fallbacks to the already existing functions if the firmware is not
> > up-to-date. Then, more Ethernet modes are added (through SMC calls
> > only). SATA, USB3H and PCIe modes are also supported one by one.
> > 
> > There is one subtle difference with the PCIe functions: we must tell
> > the firmware the number of lanes to configure (x1, x2 or x4). This
> > parameter depends on the number of entries in the 'phys' property
> > describing the PCIe PHY. We use the "submode" parameter of the generic
> > PHY API to carry this value. The Armada-8k PCIe driver has been
> > updated to follow this idea and this change has been merged already:
> > http://patchwork.ozlabs.org/patch/1072763/  
> 
> Some of the patches are not applying cleanly. Care to resend the series after
> rebasing to phy -next?

Sure, I'll do it asap.

Thanks!
Miquèl


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Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-31 12:21 Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 01/19] phy: mvebu-cp110-comphy: Add clocks support Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 02/19] phy: mvebu-cp110-comphy: Explicitly initialize the lane submode Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 03/19] phy: mvebu-cp110-comphy: Add SMC call support Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 04/19] phy: mvebu-cp110-comphy: List already supported Ethernet modes Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 05/19] phy: mvebu-cp110-comphy: Add RXAUI support Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 06/19] phy: mvebu-cp110-comphy: Rename the macro handling only Ethernet modes Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 07/19] phy: mvebu-cp110-comphy: Allow non-Ethernet modes to be configured Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 08/19] phy: mvebu-cp110-comphy: Add USB3 host/device support Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 09/19] phy: mvebu-cp110-comphy: Add SATA support Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 10/19] phy: mvebu-cp110-comphy: Cosmetic change in a helper Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 11/19] phy: mvebu-cp110-comphy: Add PCIe support Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 12/19] phy: mvebu-cp110-comphy: Update comment about powering off all lanes at boot Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 13/19] dt-bindings: phy: Add Marvell COMPHY clocks Miquel Raynal
2019-08-12 21:29   ` Rob Herring
2019-08-19  8:40     ` Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 14/19] dt-bindings: pci: add PHY properties to Armada 7K/8K controller bindings Miquel Raynal
2019-08-21 18:28   ` Rob Herring
2019-08-24 10:15     ` Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 15/19] arm64: dts: marvell: Add CP110 COMPHY clocks Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 16/19] arm64: dts: marvell: Add 7k/8k per-port PHYs in SATA nodes Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 17/19] arm64: dts: marvell: Add 7k/8k PHYs in USB3 nodes Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 18/19] arm64: dts: marvell: Add 7k/8k PHYs in PCIe nodes Miquel Raynal
2019-07-31 12:21 ` [PATCH v3 19/19] arm64: dts: marvell: Convert 7k/8k usb-phy properties to phy-supply Miquel Raynal
2019-08-23  3:16 ` [PATCH v3 00/19] Enhance CP110 COMPHY support Kishon Vijay Abraham I
2019-08-23  7:33   ` Miquel Raynal [this message]
2019-08-24 11:54   ` Miquel Raynal
2019-08-26 11:51     ` Kishon Vijay Abraham I
2019-08-26 12:23       ` Miquel Raynal
2019-08-27 14:22 ` Gregory CLEMENT

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