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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id 11sm261076otc.45.2019.08.27.15.22.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Aug 2019 15:22:52 -0700 (PDT) Date: Tue, 27 Aug 2019 17:22:51 -0500 From: Rob Herring To: =?iso-8859-1?Q?Ren=E9?= van Dorst Subject: Re: [PATCH net-next v2 2/3] dt-bindings: net: dsa: mt7530: Add support for port 5 Message-ID: <20190827222251.GA30507@bogus> References: <20190821144547.15113-1-opensource@vdorst.com> <20190821144547.15113-3-opensource@vdorst.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190821144547.15113-3-opensource@vdorst.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190827_152255_630135_91ED2797 X-CRM114-Status: GOOD ( 24.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Lunn , Florian Fainelli , Frank Wunderlich , netdev@vger.kernel.org, Sean Wang , linux-mips@vger.kernel.org, "David S . Miller" , devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, John Crispin , Matthias Brugger , Vivien Didelot , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Aug 21, 2019 at 04:45:46PM +0200, Ren=E9 van Dorst wrote: > MT7530 port 5 has many modes/configurations. > Update the documentation how to use port 5. > = > Signed-off-by: Ren=E9 van Dorst > Cc: devicetree@vger.kernel.org > Cc: Rob Herring > v1->v2: > * Adding extra note about RGMII2 and gpio use. > rfc->v1: > * No change The changelog goes below the '---' > --- > .../devicetree/bindings/net/dsa/mt7530.txt | 218 ++++++++++++++++++ > 1 file changed, 218 insertions(+) > = > diff --git a/Documentation/devicetree/bindings/net/dsa/mt7530.txt b/Docum= entation/devicetree/bindings/net/dsa/mt7530.txt > index 47aa205ee0bd..43993aae3f9c 100644 > --- a/Documentation/devicetree/bindings/net/dsa/mt7530.txt > +++ b/Documentation/devicetree/bindings/net/dsa/mt7530.txt > @@ -35,6 +35,42 @@ Required properties for the child nodes within ports c= ontainer: > - phy-mode: String, must be either "trgmii" or "rgmii" for port labeled > "cpu". > = > +Port 5 of the switch is muxed between: > +1. GMAC5: GMAC5 can interface with another external MAC or PHY. > +2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd= GMAC > + of the SOC. Used in many setups where port 0/4 becomes the WAN port. > + Note: On a MT7621 SOC with integrated switch: 2nd GMAC can only conne= cted to > + GMAC5 when the gpios for RGMII2 (GPIO 22-33) are not used and not > + connected to external component! > + > +Port 5 modes/configurations: > +1. Port 5 is disabled and isolated: An external phy can interface to the= 2nd > + GMAC of the SOC. > + In the case of a build-in MT7530 switch, port 5 shares the RGMII bus = with 2nd > + GMAC and an optional external phy. Mind the GPIO/pinctl settings of t= he SOC! > +2. Port 5 is muxed to PHY of port 0/4: Port 0/4 interfaces with 2nd GMAC. > + It is a simple MAC to PHY interface, port 5 needs to be setup for xMI= I mode > + and RGMII delay. > +3. Port 5 is muxed to GMAC5 and can interface to an external phy. > + Port 5 becomes an extra switch port. > + Only works on platform where external phy TX<->RX lines are swapped. > + Like in the Ubiquiti ER-X-SFP. > +4. Port 5 is muxed to GMAC5 and interfaces with the 2nd GAMC as 2nd CPU = port. > + Currently a 2nd CPU port is not supported by DSA code. > + > +Depending on how the external PHY is wired: > +1. normal: The PHY can only connect to 2nd GMAC but not to the switch > +2. swapped: RGMII TX, RX are swapped; external phy interface with the sw= itch as > + a ethernet port. But can't interface to the 2nd GMAC. > + > +Based on the DT the port 5 mode is configured. > + > +Driver tries to lookup the phy-handle of the 2nd GMAC of the master devi= ce. > +When phy-handle matches PHY of port 0 or 4 then port 5 set-up as mode 2. > +phy-mode must be set, see also example 2 below! > + * mt7621: phy-mode =3D "rgmii-txid"; > + * mt7623: phy-mode =3D "rgmii"; > + > See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of addi= tional > required, optional properties and how the integrated switch subnodes must > be specified. > @@ -94,3 +130,185 @@ Example: > }; > }; > }; > + > +Example 2: MT7621: Port 4 is WAN port: 2nd GMAC -> Port 5 -> PHY port 4. > + > +ð { > + status =3D "okay"; Don't show status in examples. This should show the complete node. > + > + gmac0: mac@0 { > + compatible =3D "mediatek,eth-mac"; > + reg =3D <0>; > + phy-mode =3D "rgmii"; > + > + fixed-link { > + speed =3D <1000>; > + full-duplex; > + pause; > + }; > + }; > + > + gmac1: mac@1 { > + compatible =3D "mediatek,eth-mac"; > + reg =3D <1>; > + phy-mode =3D "rgmii-txid"; > + phy-handle =3D <&phy4>; > + }; > + > + mdio: mdio-bus { > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + > + /* Internal phy */ > + phy4: ethernet-phy@4 { > + reg =3D <4>; > + }; > + > + mt7530: switch@1f { > + compatible =3D "mediatek,mt7621"; > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + reg =3D <0x1f>; > + pinctrl-names =3D "default"; > + mediatek,mcm; > + > + resets =3D <&rstctrl 2>; > + reset-names =3D "mcm"; > + > + ports { > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + > + port@0 { > + reg =3D <0>; > + label =3D "lan0"; > + }; > + > + port@1 { > + reg =3D <1>; > + label =3D "lan1"; > + }; > + > + port@2 { > + reg =3D <2>; > + label =3D "lan2"; > + }; > + > + port@3 { > + reg =3D <3>; > + label =3D "lan3"; > + }; > + > +/* Commented out. Port 4 is handled by 2nd GMAC. > + port@4 { > + reg =3D <4>; > + label =3D "lan4"; > + }; > +*/ > + > + cpu_port0: port@6 { > + reg =3D <6>; > + label =3D "cpu"; > + ethernet =3D <&gmac0>; > + phy-mode =3D "rgmii"; > + > + fixed-link { > + speed =3D <1000>; > + full-duplex; > + pause; > + }; > + }; > + }; > + }; > + }; > +}; > + > +Example 3: MT7621: Port 5 is connected to external PHY: Port 5 -> extern= al PHY. > + > +ð { > + status =3D "okay"; > + > + gmac0: mac@0 { > + compatible =3D "mediatek,eth-mac"; > + reg =3D <0>; > + phy-mode =3D "rgmii"; > + > + fixed-link { > + speed =3D <1000>; > + full-duplex; > + pause; > + }; > + }; > + > + mdio: mdio-bus { > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + > + /* External phy */ > + ephy5: ethernet-phy@7 { > + reg =3D <7>; > + }; > + > + mt7530: switch@1f { > + compatible =3D "mediatek,mt7621"; > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + reg =3D <0x1f>; > + pinctrl-names =3D "default"; > + mediatek,mcm; > + > + resets =3D <&rstctrl 2>; > + reset-names =3D "mcm"; > + > + ports { > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + > + port@0 { > + reg =3D <0>; > + label =3D "lan0"; > + }; > + > + port@1 { > + reg =3D <1>; > + label =3D "lan1"; > + }; > + > + port@2 { > + reg =3D <2>; > + label =3D "lan2"; > + }; > + > + port@3 { > + reg =3D <3>; > + label =3D "lan3"; > + }; > + > + port@4 { > + reg =3D <4>; > + label =3D "lan4"; > + }; > + > + port@5 { > + reg =3D <5>; > + label =3D "lan5"; > + phy-mode =3D "rgmii"; > + phy-handle =3D <&ephy5>; > + }; > + > + cpu_port0: port@6 { > + reg =3D <6>; > + label =3D "cpu"; > + ethernet =3D <&gmac0>; > + phy-mode =3D "rgmii"; > + > + fixed-link { > + speed =3D <1000>; > + full-duplex; > + pause; > + }; > + }; > + }; > + }; > + }; > +}; > -- = > 2.20.1 > = _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel