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From: Andrew Murray <andrew.murray@arm.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Boqun Feng <boqun.feng@gmail.com>,
	Will Deacon <will.deacon@arm.com>,
	Ard.Biesheuvel@arm.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 2/5] arm64: Use correct ll/sc atomic constraints
Date: Wed, 28 Aug 2019 17:42:07 +0100	[thread overview]
Message-ID: <20190828164207.GB14582@e119886-lin.cambridge.arm.com> (raw)
In-Reply-To: <20190828162409.GC42408@lakrids.cambridge.arm.com>

On Wed, Aug 28, 2019 at 05:24:09PM +0100, Mark Rutland wrote:
> On Wed, Aug 28, 2019 at 04:44:22PM +0100, Andrew Murray wrote:
> > On Wed, Aug 28, 2019 at 04:25:40PM +0100, Mark Rutland wrote:
> > > On Wed, Aug 28, 2019 at 02:01:19PM +0100, Andrew Murray wrote:
> > > > On Thu, Aug 22, 2019 at 04:32:23PM +0100, Mark Rutland wrote:
> > > > > On Mon, Aug 12, 2019 at 03:36:22PM +0100, Andrew Murray wrote:
> > > > > [...]
> > > > > 
> > > > > > -ATOMIC64_OPS(and, and)
> > > > > > -ATOMIC64_OPS(andnot, bic)
> > > > > > -ATOMIC64_OPS(or, orr)
> > > > > > -ATOMIC64_OPS(xor, eor)
> > > > > > +ATOMIC64_OPS(and, and, K)
> > > > > > +ATOMIC64_OPS(andnot, bic, )
> > > > > > +ATOMIC64_OPS(or, orr, K)
> > > > > > +ATOMIC64_OPS(xor, eor, K)
> > > > > 
> > > > > Shouldn't these be 'L'?
> > > > > 
> > > > > IIUC K is a subset of L, so if that's deliberate we should call that out
> > > > > explicitly...
> > > > 
> > > > Oooh yes that's wrong. I guess the atomic64_[and,or,xor] are rarely called
> > > > in the kernel which perhaps is why the compiler hasn't shouted at me.
> > > > 
> > > > Do you agree that the and, orr and eor should all be 'L' instead of 'K'?
> > > 
> > > Yes, I think all the 64-bit logical ops should all use 'L'.
> > 
> > With the exception of bic? I don't think there is an appropriate constraint
> > for this (it requires an 8 bit immediate).
> 
> The ARM ARM doesn't mention BIC (Immediate), and AFAICT that's an
> (undocumented?) alias for AND (Immediate) with a negated immediate.
> 
> Where did you find a description with an 8-bit immediate?
> 

I think it's a SIMD instruction, see C7.2.13 of ARM DDI 0487D or 
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/EOR_log_imm.html

> Regardless, yes, drop the 'L' there -- I can't find any suitable
> constraint either.

OK I'll drop it, thanks for the feedback.

Thanks,

Andrew Murray

> 
> Thanks,
> Mark.
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

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  reply	other threads:[~2019-08-28 16:42 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-12 14:36 [PATCH v3 0/5] arm64: avoid out-of-line ll/sc atomics Andrew Murray
2019-08-12 14:36 ` [PATCH v3 1/5] jump_label: Don't warn on __exit jump entries Andrew Murray
2019-08-22 15:32   ` Mark Rutland
2019-08-22 18:41     ` Andrew Murray
2019-08-12 14:36 ` [PATCH v3 2/5] arm64: Use correct ll/sc atomic constraints Andrew Murray
2019-08-22 15:32   ` Mark Rutland
2019-08-28 13:01     ` Andrew Murray
2019-08-28 15:25       ` Mark Rutland
2019-08-28 15:44         ` Andrew Murray
2019-08-28 16:24           ` Mark Rutland
2019-08-28 16:42             ` Andrew Murray [this message]
2019-08-12 14:36 ` [PATCH v3 3/5] arm64: atomics: avoid out-of-line ll/sc atomics Andrew Murray
2019-08-22 17:01   ` Mark Rutland
2019-08-28 11:53     ` Andrew Murray
2019-08-12 14:36 ` [PATCH v3 4/5] arm64: avoid using hard-coded registers for LSE atomics Andrew Murray
2019-08-12 14:36 ` [PATCH v3 5/5] arm64: atomics: remove atomic_ll_sc compilation unit Andrew Murray
2019-08-27 16:49 ` [PATCH v3 0/5] arm64: avoid out-of-line ll/sc atomics Will Deacon
2019-08-28  9:04   ` Andrew Murray

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