linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: gregkh@linuxfoundation.org
Cc: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 17/17] coresight: tmc-etr: Add barrier packets when moving offset forward
Date: Thu, 29 Aug 2019 14:28:42 -0600	[thread overview]
Message-ID: <20190829202842.580-18-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <20190829202842.580-1-mathieu.poirier@linaro.org>

This patch adds barrier packets in the trace stream when the offset in the
data buffer needs to be moved forward.  Otherwise the decoder isn't aware
of the break in the stream and can't synchronise itself with the trace
data.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Yabin Cui <yabinc@google.com>
Reviewed-by: Leo Yan <leo.yan@linaro.org>
---
 .../hwtracing/coresight/coresight-tmc-etr.c   | 29 +++++++++++++++----
 1 file changed, 24 insertions(+), 5 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index bae47272de98..625882bc8b08 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -1418,10 +1418,11 @@ static void tmc_free_etr_buffer(void *config)
  * buffer to the perf ring buffer.
  */
 static void tmc_etr_sync_perf_buffer(struct etr_perf_buffer *etr_perf,
+				     unsigned long src_offset,
 				     unsigned long to_copy)
 {
 	long bytes;
-	long pg_idx, pg_offset, src_offset;
+	long pg_idx, pg_offset;
 	unsigned long head = etr_perf->head;
 	char **dst_pages, *src_buf;
 	struct etr_buf *etr_buf = etr_perf->etr_buf;
@@ -1430,7 +1431,6 @@ static void tmc_etr_sync_perf_buffer(struct etr_perf_buffer *etr_perf,
 	pg_idx = head >> PAGE_SHIFT;
 	pg_offset = head & (PAGE_SIZE - 1);
 	dst_pages = (char **)etr_perf->pages;
-	src_offset = etr_buf->offset + etr_buf->len - to_copy;
 
 	while (to_copy > 0) {
 		/*
@@ -1478,7 +1478,7 @@ tmc_update_etr_buffer(struct coresight_device *csdev,
 		      void *config)
 {
 	bool lost = false;
-	unsigned long flags, size = 0;
+	unsigned long flags, offset, size = 0;
 	struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 	struct etr_perf_buffer *etr_perf = config;
 	struct etr_buf *etr_buf = etr_perf->etr_buf;
@@ -1506,16 +1506,35 @@ tmc_update_etr_buffer(struct coresight_device *csdev,
 	spin_unlock_irqrestore(&drvdata->spinlock, flags);
 
 	lost = etr_buf->full;
+	offset = etr_buf->offset;
 	size = etr_buf->len;
+
+	/*
+	 * The ETR buffer may be bigger than the space available in the
+	 * perf ring buffer (handle->size).  If so advance the offset so that we
+	 * get the latest trace data.  In snapshot mode none of that matters
+	 * since we are expected to clobber stale data in favour of the latest
+	 * traces.
+	 */
 	if (!etr_perf->snapshot && size > handle->size) {
-		size = handle->size;
+		u32 mask = tmc_get_memwidth_mask(drvdata);
+
+		/*
+		 * Make sure the new size is aligned in accordance with the
+		 * requirement explained in function tmc_get_memwidth_mask().
+		 */
+		size = handle->size & mask;
+		offset = etr_buf->offset + etr_buf->len - size;
+
+		if (offset >= etr_buf->size)
+			offset -= etr_buf->size;
 		lost = true;
 	}
 
 	/* Insert barrier packets at the beginning, if there was an overflow */
 	if (lost)
 		tmc_etr_buf_insert_barrier_packet(etr_buf, etr_buf->offset);
-	tmc_etr_sync_perf_buffer(etr_perf, size);
+	tmc_etr_sync_perf_buffer(etr_perf, offset, size);
 
 	/*
 	 * In snapshot mode we simply increment the head by the number of byte
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-08-29 20:33 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-29 20:28 [PATCH 00/17] coresight: next v5.3-rc6 Mathieu Poirier
2019-08-29 20:28 ` [PATCH 01/17] coresight: etm4x: Two function calls less Mathieu Poirier
2019-08-29 20:28 ` [PATCH 02/17] coresight: etm4x: Add ETM PIDs for SDM845 and MSM8996 Mathieu Poirier
2019-08-29 20:28 ` [PATCH 03/17] coresight: cpu-debug: Add support for Qualcomm Kryo Mathieu Poirier
2019-08-29 20:28 ` [PATCH 04/17] coresight: etr_buf: Consolidate refcount initialization Mathieu Poirier
2019-08-29 20:28 ` [PATCH 05/17] coresight: tmc-etr: Handle memory errors Mathieu Poirier
2019-08-29 20:28 ` [PATCH 06/17] coresight: tmc-etr: Check if non-secure access is enabled Mathieu Poirier
2019-08-29 20:28 ` [PATCH 07/17] coresight: Convert pr_warn to dev_warn for obsolete bindings Mathieu Poirier
2019-08-29 20:28 ` [PATCH 08/17] coresight: acpi: Static funnel support Mathieu Poirier
2019-08-29 20:28 ` [PATCH 09/17] coresight: etm4x: Remove superfluous setting of os_unlock Mathieu Poirier
2019-08-29 20:28 ` [PATCH 10/17] coresight: etm4x: Use explicit barriers on enable/disable Mathieu Poirier
2019-08-29 20:28 ` [PATCH 11/17] coresight: etm4x: use module_param instead of module_param_named Mathieu Poirier
2019-08-29 20:28 ` [PATCH 12/17] coresight: etm4x: improve clarity of etm4_os_unlock comment Mathieu Poirier
2019-08-29 20:28 ` [PATCH 13/17] coresight: tmc-etr: Fix updating buffer in not-snapshot mode Mathieu Poirier
2019-08-29 20:28 ` [PATCH 14/17] coresight: tmc-etr: Fix perf_data check Mathieu Poirier
2019-08-29 20:28 ` [PATCH 15/17] coresight: tmc: Make memory width mask computation into a function Mathieu Poirier
2019-08-29 20:28 ` [PATCH 16/17] coresight: tmc-etr: Decouple buffer sync and barrier packet insertion Mathieu Poirier
2019-08-29 20:28 ` Mathieu Poirier [this message]
2019-09-03 20:02 ` [PATCH 00/17] coresight: next v5.3-rc6 Greg KH

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190829202842.580-18-mathieu.poirier@linaro.org \
    --to=mathieu.poirier@linaro.org \
    --cc=gregkh@linuxfoundation.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).