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From: Alexandre Belloni <alexandre.belloni@bootlin.com>
To: Eugen.Hristev@microchip.com
Cc: sboyd@kernel.org, mturquette@baylibre.com,
	linux-kernel@vger.kernel.org, Ludovic.Desroches@microchip.com,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/2] clk: at91: select parent if main oscillator or bypass is enabled
Date: Wed, 11 Sep 2019 14:21:37 +0200	[thread overview]
Message-ID: <20190911122137.GM21254@piout.net> (raw)
In-Reply-To: <1568042692-11784-2-git-send-email-eugen.hristev@microchip.com>

On 09/09/2019 15:30:34+0000, Eugen.Hristev@microchip.com wrote:
> From: Eugen Hristev <eugen.hristev@microchip.com>
> 
> Selecting the right parent for the main clock is done using only
> main oscillator enabled bit.
> In case we have this oscillator bypassed by an external signal (no driving
> on the XOUT line), we still use external clock, but with BYPASS bit set.
> So, in this case we must select the same parent as before.
> Create a macro that will select the right parent considering both bits from
> the MOR register.
> Use this macro when looking for the right parent.
> 
> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

> ---
>  drivers/clk/at91/clk-main.c | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
> index ebe9b99..87083b3 100644
> --- a/drivers/clk/at91/clk-main.c
> +++ b/drivers/clk/at91/clk-main.c
> @@ -21,6 +21,10 @@
>  
>  #define MOR_KEY_MASK		(0xff << 16)
>  
> +#define clk_main_parent_select(s)	(((s) & \
> +					(AT91_PMC_MOSCEN | \
> +					AT91_PMC_OSCBYPASS)) ? 1 : 0)
> +
>  struct clk_main_osc {
>  	struct clk_hw hw;
>  	struct regmap *regmap;
> @@ -113,7 +117,7 @@ static int clk_main_osc_is_prepared(struct clk_hw *hw)
>  
>  	regmap_read(regmap, AT91_PMC_SR, &status);
>  
> -	return (status & AT91_PMC_MOSCS) && (tmp & AT91_PMC_MOSCEN);
> +	return (status & AT91_PMC_MOSCS) && clk_main_parent_select(tmp);
>  }
>  
>  static const struct clk_ops main_osc_ops = {
> @@ -450,7 +454,7 @@ static u8 clk_sam9x5_main_get_parent(struct clk_hw *hw)
>  
>  	regmap_read(clkmain->regmap, AT91_CKGR_MOR, &status);
>  
> -	return status & AT91_PMC_MOSCEN ? 1 : 0;
> +	return clk_main_parent_select(status);
>  }
>  
>  static const struct clk_ops sam9x5_main_ops = {
> @@ -492,7 +496,7 @@ at91_clk_register_sam9x5_main(struct regmap *regmap,
>  	clkmain->hw.init = &init;
>  	clkmain->regmap = regmap;
>  	regmap_read(clkmain->regmap, AT91_CKGR_MOR, &status);
> -	clkmain->parent = status & AT91_PMC_MOSCEN ? 1 : 0;
> +	clkmain->parent = clk_main_parent_select(status);
>  
>  	hw = &clkmain->hw;
>  	ret = clk_hw_register(NULL, &clkmain->hw);
> -- 
> 2.7.4
> 

-- 
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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  reply	other threads:[~2019-09-11 12:22 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-09 15:30 [PATCH 1/2] clk: at91: fix update bit maps on CFG_MOR write Eugen.Hristev
2019-09-09 15:30 ` [PATCH 2/2] clk: at91: select parent if main oscillator or bypass is enabled Eugen.Hristev
2019-09-11 12:21   ` Alexandre Belloni [this message]
2019-09-16  5:25   ` Claudiu.Beznea
2019-09-16 20:15   ` Stephen Boyd
2019-09-10 15:16 ` [PATCH 1/2] clk: at91: fix update bit maps on CFG_MOR write Alexandre Belloni
2019-09-16  5:24 ` Claudiu.Beznea
2019-09-16 20:15 ` Stephen Boyd

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