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Fri, 27 Sep 2019 01:54:12 -0700 (PDT) Received: from pi3 ([194.230.155.145]) by smtp.googlemail.com with ESMTPSA id l6sm4346315wmg.2.2019.09.27.01.54.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 01:54:12 -0700 (PDT) Date: Fri, 27 Sep 2019 10:53:59 +0200 From: Krzysztof Kozlowski To: Lukasz Luba Subject: Re: [PATCH 1/3] ARM: dts: exynos: Add interrupt to DMC controller in Exynos5422 Message-ID: <20190927085359.GA19131@pi3> References: <20190925161813.21117-1-l.luba@partner.samsung.com> <20190925161813.21117-2-l.luba@partner.samsung.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190925161813.21117-2-l.luba@partner.samsung.com> User-Agent: Mutt/1.12.1 (2019-06-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190927_015415_064253_931FCFEF X-CRM114-Status: GOOD ( 14.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, willy.mh.wolff.ml@gmail.com, linux-samsung-soc@vger.kernel.org, b.zolnierkie@samsung.com, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, cw00.choi@samsung.com, kyungmin.park@samsung.com, kgene@kernel.org, myungjoo.ham@samsung.com, s.nawrocki@samsung.com, linux-arm-kernel@lists.infradead.org, m.szyprowski@samsung.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Sep 25, 2019 at 06:18:11PM +0200, Lukasz Luba wrote: > Add interrupt to Dynamic Memory Controller in Exynos5422 and Odroid > XU3-family boards. It will be used instead of devfreq polling mode > governor. The interrupt is connected to performance counters private > for DMC, which might track utilisation of the memory channels. > > Signed-off-by: Lukasz Luba > --- > arch/arm/boot/dts/exynos5420.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi > index ac49373baae7..72738e620d11 100644 > --- a/arch/arm/boot/dts/exynos5420.dtsi > +++ b/arch/arm/boot/dts/exynos5420.dtsi > @@ -240,6 +240,8 @@ > dmc: memory-controller@10c20000 { > compatible = "samsung,exynos5422-dmc"; > reg = <0x10c20000 0x100>, <0x10c30000 0x100>; > + interrupt-parent = <&combiner>; > + interrupts = <16 0>; You register DMC for DREX0 and DREX1 but take only DREX0 interrupt. Why skipping second? Best regards, Krzysztof > clocks = <&clock CLK_FOUT_SPLL>, > <&clock CLK_MOUT_SCLK_SPLL>, > <&clock CLK_FF_DOUT_SPLL2>, > -- > 2.17.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel