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Mon, 30 Sep 2019 01:02:23 -0700 (PDT) Received: from pi3 ([194.230.155.145]) by smtp.googlemail.com with ESMTPSA id a3sm19395536wmc.3.2019.09.30.01.02.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Sep 2019 01:02:22 -0700 (PDT) Date: Mon, 30 Sep 2019 10:02:17 +0200 From: Krzysztof Kozlowski To: Olof Johansson Subject: Re: [GIT PULL 1/2] arm64: dts: exynos: Pull for v5.4 Message-ID: <20190930080217.GA23709@pi3> References: <20190911183632.4317-1-krzk@kernel.org> <20190929175134.fsieffurfdiqhpj2@localhost> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190929175134.fsieffurfdiqhpj2@localhost> User-Agent: Mutt/1.12.1 (2019-06-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190930_010225_565908_872C66BE X-CRM114-Status: GOOD ( 23.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: DTML , "moderated list:ARM/SAMSUNG EXYNOS ARM ARCHITECTURES" , Arnd Bergmann , "linux-kernel@vger.kernel.org" , SoC Team , arm-soc , Kukjin Kim , Linux ARM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, Sep 29, 2019 at 10:51:34AM -0700, Olof Johansson wrote: > Hi, > > On Thu, Sep 12, 2019 at 08:32:47AM +0200, Krzysztof Kozlowski wrote: > > On Wed, 11 Sep 2019 at 23:07, Arnd Bergmann wrote: > > > > > > On Wed, Sep 11, 2019 at 8:36 PM Krzysztof Kozlowski wrote: > > > > > > > > Hi, > > > > > > > > Unfortunately the patches were applied right after closing the linux-next. > > > > > > Hi Krzysztof, > > > > > > I took a look at these and am not convinced this is right: > > > > > > > 1. Fix boot of Exynos7 due to wrong address/size of memory node, > > > > > > The current state is clearly broken and a fix is needed, but > > > I'm not sure this is the right fix. Why do you have 32-bit physical > > > addressing on a 64-bit chip? I looked at commit ef72171b3621 > > > that introduced it, and it seems it would be better to just > > > revert back to 64-bit addresses. > > > > We discussed with Marek Szyprowski that either we can go back to > > 64-bit addressing or stick to 32. There are not known boards with more > > than 4 GB of RAM so from this point of view the choice was irrelevant. > > At the end of discussion I mentioned to stick with other arm64 boards > > (although not all), so revert to have 64 bit address... but Marek > > chosen differently. Since you ask, let's go back with revert. > > > > > > > > > 2. Move GPU under /soc node, > > > > > > No problem > > > > > > > 3. Minor cleanup of #address-cells. > > > > > > IIRC, an interrupt-controller is required to have a #address-cells > > > property, even if that is normally zero. I don't remember the > > > details, but the gic binding lists it as mandatory, and I think > > > the PCI interrupt-map relies on it. I would just drop this patch. > > > > Indeed, binding requires both address and size cells. I'll drop it. > > Looking through the history of pending material, I didn't see a new pull for > this material. Just checking in to see if there's something we missed? No, it's me who forgot to resend. I was sure that I rebased the branch and created new pull request. However it seems I did not. Let's keep it for next merge window... v5.4-rc should be any minute, I guess? Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel