From: Marc Zyngier <maz@kernel.org>
To: Will Deacon <will@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
Suzuki K Poulose <suzuki.poulose@arm.com>,
linux-kernel@vger.kernel.org, James Morse <james.morse@arm.com>,
uohanjun@huawei.com, huawei.libin@huawei.com,
liwei391@huawei.com,
Julien Thierry <julien.thierry.kdev@gmail.com>
Subject: [PATCH v3 0/2] arm64: Relax ICC_PMR_EL1 synchronisation when possible
Date: Wed, 2 Oct 2019 10:06:11 +0100 [thread overview]
Message-ID: <20191002090613.14236-1-maz@kernel.org> (raw)
This is a very late update on [1], fixing the 32bit compilation issue that
was present in v2, and adding an extra message in the kernel log to find out
what is going on.
[1] http://lore.kernel.org/r/20190802125208.73162-1-maz@kernel.org
Marc Zyngier (2):
arm64: Relax ICC_PMR_EL1 accesses when ICC_CTLR_EL1.PMHE is clear
arm64: Document ICC_CTLR_EL3.PMHE setting requirements
Documentation/arm64/booting.rst | 3 +++
arch/arm64/include/asm/barrier.h | 12 ++++++++++++
arch/arm64/include/asm/daifflags.h | 3 ++-
arch/arm64/include/asm/irqflags.h | 19 ++++++++++---------
arch/arm64/include/asm/kvm_host.h | 3 +--
arch/arm64/kernel/entry.S | 6 ++++--
arch/arm64/kvm/hyp/switch.c | 4 ++--
drivers/irqchip/irq-gic-v3.c | 20 ++++++++++++++++++++
include/linux/irqchip/arm-gic-v3.h | 2 ++
9 files changed, 56 insertions(+), 16 deletions(-)
--
2.20.1
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next reply other threads:[~2019-10-02 9:19 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-02 9:06 Marc Zyngier [this message]
2019-10-02 9:06 ` [PATCH v3 1/2] arm64: Relax ICC_PMR_EL1 accesses when ICC_CTLR_EL1.PMHE is clear Marc Zyngier
2019-10-23 8:38 ` liwei (GF)
2019-10-23 12:13 ` Marc Zyngier
2019-10-26 1:42 ` liwei (GF)
2019-10-02 9:06 ` [PATCH v3 2/2] arm64: Document ICC_CTLR_EL3.PMHE setting requirements Marc Zyngier
2019-10-15 17:30 ` [PATCH v3 0/2] arm64: Relax ICC_PMR_EL1 synchronisation when possible Catalin Marinas
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