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dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org Date: Thu, 3 Oct 2019 11:33:52 -0600 From: Jordan Crouse To: Robin Murphy Subject: Re: [PATCH 3/4] iommu/io-pgtable-arm: Rationalise TCR handling Message-ID: <20191003173352.GA13386@jcrouse1-lnx.qualcomm.com> Mail-Followup-To: Robin Murphy , Will Deacon , joro@8bytes.org, iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, robdclark@gmail.com References: <78df4f8e2510e88f3ded59eb385f79b4442ed4f2.1566238530.git.robin.murphy@arm.com> <20190820103115.o7neehdethf7sbqi@willie-the-truck> <48ca6945-de73-116a-3230-84862ca9e60b@arm.com> <20190820160700.6ircxomwuo5bksqz@willie-the-truck> <8cc47f43-ad74-b4e2-e977-6c78780abc91@arm.com> <20190821121120.34wqo7vj56pqk57c@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191003_103401_586668_190F832B X-CRM114-Status: GOOD ( 25.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robdclark@gmail.com, joro@8bytes.org, Will Deacon , iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Aug 21, 2019 at 01:56:20PM +0100, Robin Murphy wrote: > On 21/08/2019 13:11, Will Deacon wrote: > >On Tue, Aug 20, 2019 at 07:41:52PM +0100, Robin Murphy wrote: > >>On 20/08/2019 17:07, Will Deacon wrote: > >>>On Tue, Aug 20, 2019 at 04:25:56PM +0100, Robin Murphy wrote: > >>>>On 20/08/2019 11:31, Will Deacon wrote: > >>>>>On Mon, Aug 19, 2019 at 07:19:30PM +0100, Robin Murphy wrote: > >>>>>>Although it's conceptually nice for the io_pgtable_cfg to provide a > >>>>>>standard VMSA TCR value, the reality is that no VMSA-compliant IOMMU > >>>>>>looks exactly like an Arm CPU, and they all have various other TCR > >>>>>>controls which io-pgtable can't be expected to understand. Thus since > >>>>>>there is an expectation that drivers will have to add to the given TCR > >>>>>>value anyway, let's strip it down to just the essentials that are > >>>>>>directly relevant to io-pgatble's inner workings - namely the address > >>>>>>sizes, walk attributes, and where appropriate, format selection. > >>>>>> > >>>>>>Signed-off-by: Robin Murphy > >>>>>>--- > >>>>>> drivers/iommu/arm-smmu-v3.c | 7 +------ > >>>>>> drivers/iommu/arm-smmu.c | 1 + > >>>>>> drivers/iommu/arm-smmu.h | 2 ++ > >>>>>> drivers/iommu/io-pgtable-arm-v7s.c | 6 ++---- > >>>>>> drivers/iommu/io-pgtable-arm.c | 4 ---- > >>>>>> drivers/iommu/qcom_iommu.c | 2 +- > >>>>>> 6 files changed, 7 insertions(+), 15 deletions(-) > >>>>> > >>>>>Hmm, so I'm a bit nervous about this one since I think we really should > >>>>>be providing a TCR with EPD1 set if we're only giving you TTBR0. Relying > >>>>>on the driver to do this worries me. See my comments on the next patch. > >>>> > >>>>The whole idea is that we already know we can't provide a *complete* TCR > >>>>value (not least because anything above bit 31 is the wild west), thus > >>>>there's really no point in io-pgtable trying to provide anything other than > >>>>the parts it definitely controls. It makes sense to provide this partial TCR > >>>>value "as if" for TTBR0, since that's the most common case, but ultimately > >>>>io-pgatble doesn't know (or need to) which TTBR the caller intends to > >>>>actually use for this table. Even if the caller *is* allocating it for > >>>>TTBR0, io-pgtable doesn't know that they haven't got something live in TTBR1 > >>>>already, so it still wouldn't be in a position to make the EPD1 call either > >>>>way. > >>> > >>>Ok, but the driver can happily rewrite/ignore what it gets back. I suppose > >>>an alternative would be scrapped the 'u64 tcr' and instead having a bunch > >>>of named bitfields for the stuff we're actually providing, although I'd > >>>still like EPDx to be in there. > >> > >>I like the bitfield idea; it would certainly emphasise the "you have to do > >>something more with this" angle that I'm pushing towards here, but still > >>leave things framed in TCR terms without having to go to some more general > >>abstraction. It really doesn't play into your EPD argument though - such a > >>config would be providing TxSZ/TGx/IRGNx/ORGNx/SHx, but EPDy, for y = !x. > >>For a driver to understand that and do the right thing with it is even more > >>involved than for the driver to just set EPD1 by itself anyway. > > > >Having considered the bitfield idea some more, I'm less attached to EPDx > >because we simply wouldn't be making a statement about them, rather than a > >(dangerous) zero value and expecting it to be ignored. So I think we're in > >agreement on that. > > Cool, I'll give bitfields a go for v2. > > >The only part I'm still stuck to is that I think io-pgtable should know > >whether it's targetting TTBR0 or TTBR1 so that it can sanitise input > >addresses correctly. Doing this in the driver code is possible, but I'd > >rather not start from that position, particularly as it would require things > >like sign-extension in the TLBI callbacks. Bumping this as is our tradition in the -rc1 time frame before we get all distracted with other stuff. It sounds like the last agreement was for a TTBR1 hint for the EDP and the sign extension in the functions. Let me know if you need any help. I've got a little time and more than a little motivation to keep slogging ahead toward a glorious arm-smmu-v2 per-context pagetable future. Jordan -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel