From: Andrew Murray <andrew.murray@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: kvm@vger.kernel.org, Suzuki K Poulose <suzuki.poulose@arm.com>,
James Morse <james.morse@arm.com>,
linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu,
Julien Thierry Julien Thierry <julien.thierry.kdev@gmail.com>
Subject: Re: [PATCH] KVM: arm64: pmu: Fix cycle counter truncation on counter stop
Date: Fri, 4 Oct 2019 09:55:55 +0100 [thread overview]
Message-ID: <20191004085554.GQ42880@e119886-lin.cambridge.arm.com> (raw)
In-Reply-To: <20191003172400.21157-1-maz@kernel.org>
On Thu, Oct 03, 2019 at 06:24:00PM +0100, Marc Zyngier wrote:
> When a counter is disabled, its value is sampled before the event
> is being disabled, and the value written back in the shadow register.
>
> In that process, the value gets truncated to 32bit, which is adequate
Doh, that shouldn't have happened.
> for any counter but the cycle counter, which can be configured to
> hold a 64bit value. This obviously results in a corrupted counter,
> and things like "perf record -e cycles" not working at all when
> run in a guest...
>
> Make the truncation conditional on the counter not being 64bit.
>
> Fixes: 80f393a23be6 ("KVM: arm/arm64: Support chained PMU counters")
> Cc: Andrew Murray <andrew.murray@arm.com>
> Reported-by: Julien Thierry Julien Thierry <julien.thierry.kdev@gmail.com>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
> virt/kvm/arm/pmu.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c
> index 362a01886bab..d716aef2bae9 100644
> --- a/virt/kvm/arm/pmu.c
> +++ b/virt/kvm/arm/pmu.c
> @@ -206,9 +206,11 @@ static void kvm_pmu_stop_counter(struct kvm_vcpu *vcpu, struct kvm_pmc *pmc)
> __vcpu_sys_reg(vcpu, reg) = lower_32_bits(counter);
> __vcpu_sys_reg(vcpu, reg + 1) = upper_32_bits(counter);
> } else {
> + if (!kvm_pmu_idx_is_64bit(vcpu, pmc->idx))
> + counter = lower_32_bits(counter);
> reg = (pmc->idx == ARMV8_PMU_CYCLE_IDX)
> ? PMCCNTR_EL0 : PMEVCNTR0_EL0 + pmc->idx;
> - __vcpu_sys_reg(vcpu, reg) = lower_32_bits(counter);
> + __vcpu_sys_reg(vcpu, reg) = counter;
The other uses of lower_32_bits look OK to me.
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
As a side note, I'm not convinced that the implementation (or perhaps the
use of) kvm_pmu_idx_is_64bit is correct:
static bool kvm_pmu_idx_is_64bit(struct kvm_vcpu *vcpu, u64 select_idx)
{
return (select_idx == ARMV8_PMU_CYCLE_IDX &&
__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_LC);
}
We shouldn't truncate the value of a cycle counter to 32 bits just because
_PMCR_LC is unset. We should only be interested in _PMCR_LC when setting
the sample_period.
If you agree this is wrong, I'll spin a change.
Though unsetting _PMCR_LC is deprecated so I can't imagine this causes any
issue.
Thanks,
Andrew Murray
> }
>
> kvm_pmu_release_perf_event(pmc);
> --
> 2.20.1
>
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next prev parent reply other threads:[~2019-10-04 8:56 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-03 17:24 [PATCH] KVM: arm64: pmu: Fix cycle counter truncation on counter stop Marc Zyngier
2019-10-04 8:55 ` Andrew Murray [this message]
2019-10-04 10:08 ` Marc Zyngier
2019-10-04 14:10 ` Andrew Murray
2019-10-04 14:42 ` Marc Zyngier
2019-10-04 15:06 ` Andrew Murray
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